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User’s Manual
µµµµ PD789800 Subseries
8-Bit Single-Chip Microcontrollers
µµµµ PD789800
µµ PD78F9801
µµ
Document No. U12978EJ3V0UD00 (3rd edition)
Date Published February 2003 N CP (K)
1998, 2003
Printed in Japan
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[MEMO] User’s Manual U12978EJ3V0UD 2
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NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static
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These commodities, technology or software, must be exported in accordance with the export administration regulations of the exporting country. Diversion contrary to the law of that country is prohibited. • The information in this document is current as of September, 2002. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics produ
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Regional Information Some information contained in this document may vary from country to country. Before using any NEC Electronics product in your application, pIease contact the NEC Electronics office in your country to obtain a list of authorized representatives and distributors. They will verify: • Device availability • Ordering information • Product release schedule • Availability of related technical literature • Development environment specifications (for example, specificati
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Major Revisions in This Edition Page Contents Throughout Deletion of CU-type and GB-3BS type packages Deletion of indication “under development” for µ PD78F9801 p. 21 Modification of operating ambient temperature when flash memory is written in 1.1 Features p. 27 Addition of outline of timer in 1.7 Functions pp. 29, 31 to 33 Modification of handling of REGC and VPP pins pp. 35, 36 Correction of address values in Figure 3-1 Memory Map (µµ PD789800) and Figure 3-2 Memory Map µµ (µµ PD78F9801)
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INTRODUCTION Readers This manual is intended for users who wish to understand the functions of the µ PD789800 Subseries and who design and develop its application systems and programs. Target products: •µ PD789800 Subseries: µ PD789800 and µ PD78F9801 Purpose This manual is intended to give users an understanding of the functions described in the Organization below. Organization Two manuals are available for the µ PD789800 Subseries: This manual and the Instruction Manual (common to the 78K/0S
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Related Documents The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such. Documents Related to Devices Document Name Document No. µ PD789800 Subseries User’s Manual This manual 78K/0S Series Instructions User’s Manual U11047E Documents Related to Development Tools (Software) (User’s Manuals) Document Name Document No. RA78K0S Assembler Package Operation U14876E Language U14877E Structured Assembly Language U11623
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Other Related Documents Document Name Document No. SEMICONDUCTOR SELECTION GUIDE - Products and Packages - (CD-ROM) X13769X Semiconductor Device Mounting Technology Manual C10535E Quality Grades on NEC Semiconductor Devices C11531E NEC Semiconductor Device Reliability/Quality Control System C10983E Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD) C11892E Caution The related documents listed above are subject to change without notice. Be sure to use the latest
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TABLE OF CONTENTS CHAPTER 1 GENERAL..........................................................................................................................21 1.1 Features ......................................................................................................................................21 1.2 Applications................................................................................................................................21 1.3 Ordering Information ..............
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3.3.4 Register addressing ......................................................................................................................50 3.4 Operand Address Addressing...................................................................................................51 3.4.1 Direct addressing ..........................................................................................................................51 3.4.2 Short direct addressing ..........................................
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CHAPTER 7 WATCHDOG TIMER ........................................................................................................91 7.1 Watchdog Timer Functions.......................................................................................................91 7.2 Watchdog Timer Configuration ................................................................................................92 7.3 Registers Controlling Watchdog Timer ........................................................
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11.4.2 Maskable interrupt acknowledgment operation...........................................................................173 11.4.3 Multiplexed interrupt servicing.....................................................................................................175 11.4.4 Interrupt request hold ..................................................................................................................177 CHAPTER 12 STANDBY FUNCTION................................................
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B.1 Register Index (Alphabetic Order of Register Name)...........................................................229 B.2 Register Index (Alphabetic Order of Register Symbol)........................................................231 APPENDIX C REVISION HISTORY ....................................................................................................233 User’s Manual U12978EJ3V0UD 14
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LIST OF FIGURES (1/4) Figure No. Title Page 2-1 Pin I/O Circuits ......................................................................................................................................... 34 3-1 Memory Map (µ PD789800)...................................................................................................................... 35 3-2 Memory Map (µ PD78F9801)....................................................................................................................
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LIST OF FIGURES (2/4) Figure No. Title Page 6-7 Interval Timer Operation Timing of 8-Bit Timer/Event Counter 01............................................................86 6-8 Timing of External Event Counter Operation (with Rising Edge Specified)..............................................87 6-9 Timing of Square-Wave Output ................................................................................................................89 6-10 Start Timing of 8-Bit Timer Counter..............
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LIST OF FIGURES (3/4) Figure No. Title Page 8-31 Flow Chart of NRZI Encoder Operation ................................................................................................. 150 8-32 Timing of Bit Stuffing/Strip Controller Operation .................................................................................... 151 8-33 Flow Chart of Bit Stuffing Control Operation .......................................................................................... 152 8-34 Flow Chart of Bit
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LIST OF FIGURES (4/4) Figure No. Title Page 14-3 Example of Connection with Dedicated Flash Programmer ...................................................................193 14-4 VPP Pin Connection Example..................................................................................................................195 14-5 Signal Conflict (Input Pin of Serial Interface)..........................................................................................196 14-6 Abnormal Operation of Othe
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LIST OF TABLES (1/2) Table No. Title Page 2-1 Type of Pin I/O Circuit Recommended Connection of Unused Pins ........................................................ 33 3-1 Vector Table............................................................................................................................................. 37 3-2 Special Function Register List.................................................................................................................. 45 4-1 Functions of Po
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LIST OF TABLES (2/2) Table No. Title Page 12-3 STOP Mode Operation Status ................................................................................................................183 12-4 Operation After Release of STOP Mode ................................................................................................185 13-1 Hardware Status After Reset..................................................................................................................188 14-1 Differences B
