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TM
Technology for Innovators
Interface Selection Guide
4Q 2006
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2 Interface Selection Guide ‘ Table of Contents Introduction 3 LVDS, xECL, CML . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Multipoint-LVDS (M-LVDS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Digital Isolators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 RS-485/422 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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3 Interface Selection Guide Introduction Texas Instruments (TI) provides complete interface solutions that empower you to differentiate your products and accelerate time-to-market. Our expertise in high-speed, mixed-signal circuits, system-on-a-chip integration and advanced product development processes ensures you will receive the silicon, support tools, software and technical documentation to create and deliver the best products on time and at competitive prices. Included in this selection gu
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4 LVDS, xECL, CML ‘ time of a clock signal, can limit the maximum constant current driver delivers about 3.5 mA Design Considerations bandwidth performance and lead to data to a 100-W load. Signaling Rate — TI offers repeaters/transla- sampling errors. Low skew specifications tors and crosspoint switches with signaling make high-speed interconnect devices Technical Information rates up to 4.0 Gbps. excellent for signal buffering. • LVDS is based on the TIA/EIA-644A Jitter — Reducing jitter,
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5 LVDS, xECL, CML LVDS/LVPECL/CML Repeaters/Translators and Crosspoints Selection Guide No. No. Signaling Jitter Part-to- Tx tpd Rx ESD of of Input Output Rate Max Part Typtpd Typ I HBM Pin/ CC 1 Device Description Tx Rx Signal Signal (Mbps) (ps) Skew Max (ns) (ns) Max (mA) (kV) Package(s) Price* Crosspoint Switch Family SN65LVCP22 2X2 Crosspoint Switch: 2 2 LVPECL, LVDS 1000 105 100 0.65 0.65 85 5 16SOIC, 2.70 LVDS Outputs LVDS, CML 16TSSOP SN65LVCP23 2X2 Crosspoint Switch: 2 2 LVPECL, LVP
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6 LVDS, xECL, CML ‘ LVDS Selection Guide Signaling Part-to-Part Tx tpd No. of No. of Rate Skew Max Typ Device Description Tx Rx Input Signal Output Signal (Mbps) (ps) (ns) Single SN65LVDS1 Driver 1 — LVTTL LVDS 630 — 1.7 1 SN65LVDS2 Receiver — 1 LVDS LVTTL 400 — 1.7 SN65LVDS179 Full-Duplex Transceiver, No Enables 1 1 LVDS, LVTTL LVTTL, LVDS 400 — 1.7 SN65LVDS180 Full-Duplex Transceiver, with Enables 1 1 LVDS, LVTTL LVTTL, LVDS 400 — 1.7 Dual SN65LVDS9638 Driver 2 — LVTTL LVDS 400 800 1.7 SN6
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7 LVDS, xECL, CML LVDS Selection Guide I Rx ESD Supply CC tpd Typ Max HBM Voltage Device (ns) (mA) (kV) (V) Pin/Package(s) Price* Single Family SN65LVDS1 — 8 15 3.3 8SOIC, 5SOP 0.47 1 SN65LVDS2 2.6 7 15 3.3 8SOIC, 5SOP 0.47 SN65LVDS179 3.7 12 12 3.3 8SOIC, 8VSSOP 1.35 SN65LVDS180 3.7 12 12 3.3 14SOIC, 14TSSOP 1.35 Dual Family SN65LVDS9638 — 13 8 3.3 8HTSSOP, 8SOIC, 8VSSOP 1.15 SN65LVDS9637 2.1 10 8 3.3 8HTSSOP, 8SOIC, 8VSSOP 1.15 SN65LVDS049 1.9 35 10 3.3 16TSSOP 1.00 SN65LVDS050 3.7 20 12 3.3 1
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8 Multipoint-LVDS (M-LVDS) ‘ Type 1 M-LVDS Devices from TI Type 2 M-LVDS Features 2.4 V • TIA/EIA-899 standard compliant • TIA/EIA-899 standard guarantees true multipoint • Driver output current High High • Type 1 receivers: 25-mV hysteresis 150 mV • • 11.3 mA vs. 3.5 mA (LVDS) 50 mV to prevent oscillation • Receiver thresholds • Type 2 receivers: internal failsafe V 0 mV • • 50 mV vs. 100 mV (LVDS) ID (no external bias network) • Driver edge rate control –50 mV • –1-V to 3.4-V common mode • •
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9 Multipoint-LVDS (M-LVDS) M-LVDS Selection Guide Tx Rx I No.No.Half/ Signaling Part-to- tpd tpd ESD TIA/EIA-899 CC ofofRxFull RatePart Skew Typ TypMaxHBMPin/Standard 1 Device Tx Rx Type Duplex Input Signal Output Signal (Mbps) Max (ps) (ns) (ns) (mA) (kV) Package(s) Compliance Price* SN65MLVD2 — 1 1 — M-LVDS LVTTL 200 — — — — — — 4 Web SN65MLVD3 — 1 2 — M-LVDS LVTTL 200 — — — — — — 4 Web SN65MLVD200A 1 1 1 Half LVTTL, M-LVDS LVTTL, M-LVDS 100 1000 2.5 3.6 24 8 8SOIC 4 1.55 SN65MLVD201 1 1 1 Hal
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Isolators ISO721 10 Digital Isolators ‘ Recently introduced alternative isolation Design Considerations Technical Information techniques that use magnetic coupling may The ISO72xx is a family of digital isolators Reliability — Best-in-class, high voltage still share the deficiencies of the older opto- using the industry’s first application of digital and functional reliability with > 25 years. coupler solutions such as a restricted operating capacitive isolation technology. Digital buffers te
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11 RS-485/422 range allows data exchange at signaling rates 20 percent of the characteristic impedance Design Considerations of up to 50 Mbps or to distances of several of the cable and can vary from 90 Ω to 120 Ω. Interoperability — In general, RS-485 is a kilometers at lower rates. superset of RS-422. Compliance with the Technical Information TIA/EIA standard will ensure reliable data Line Loading — RS-422 is capable of support- • The main difference between RS-422 and communication in a vari
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12 RS-485/422 ‘ RS-485/422 Selection Guide Signaling No. of Supply Rate ESD Receiver 1 Dr/Rx (V) Enables Device Features (Mbps) (kV) Fail-Safe Nodes Package(s) Price* DE, RE HVD12 3.3V Supply – Low-Speed Slew-Rate Control 1 15 Short, Open, Idle 256 8-PDIP, 8-SOIC 1.75 DE, RE HVD11 3.3V Supply – Low-Speed Slew-Rate Control 10 15 Short, Open, Idle 256 8-PDIP, 8-SOIC 1.80 3.3 DE, RE HVD10 3.3V Supply – High-Speed Signaling 25 15 Short, Open, Idle 64 8-PDIP, 8-SOIC 1.85 DE, RE HVD08 Wide Supply R
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13 RS-232 RS232: IEC6100-4-2 (Level 4) Key Features Applications ESD-Protected Devices • No external ESD device needed with • The three-driver, five-receiver MAX3243E TI offers new RS-232 devices with system- these system-level ESD ratings: is most popular in applications like PCs, – ±15-kV human-body model (HBM) level IEC61000-4-2 electrostatic discharge notebooks and servers. – ±8-kV IEC61000-4-2, contact (ESD) protection. This protection makes the • The MAX3238E/37E offer discharge RS-232 i
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14 RS-232 ‘ RS232 Selection Guide Data Rate ESD Supply I CC Device (kbps) Drivers Receivers HBM (kV) Voltage(s) (V) (max) (mA) Pin/Package(s) Price* MAX3223E 500 2 2 IEC61000-4-2 3.3, 5 1 20SOIC, 20SSOP, 20TSSOP, 24QFN 0.84 MAX3222E 500 2 2 IEC61000-4-2 3.3, 5 1 20SOIC, 20SSOP, 20TSSOP, 24QFN 1.00 SN75C3222E 1000 2 2 IEC61000-4-2 3.3, 5 1 20SOIC, 20SSOP, 20TSSOP, 24QFN 2.50 SN65C3222E 1000 2 2 IEC61000-4-2 3.3, 5 1 20SOIC, 20SSOP, 20TSSOP, 24QFN 2.88 SN75C3223E 1000 2 2 IEC61000-4-2 3.3, 5 1 20S
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15 RS-232 RS-232 Selection Guide (Continued) Data Rate ESD Supply I CC Device (kbps) Drivers Receivers HBM (kV) Voltage(s) (V) (max) (mA) Pin/Package Price* SN75C1406 120 3 3 2KV HBM ± 12, 5 0.45 16PDIP, 16SO, 16SOIC 0.86 SN75C185 120 3 5 2KV HBM ± 12, 5 0.75 20PDIP, 20SOIC 1.08 SN75C188 120 4 — 2KV HBM –12 0.16 14PDIP, 14SO, 14SOIC, 14SSOP 0.31 TL145406 120 3 3 2KV HBM ± 12, 5 20 16PDIP, 16SOIC 0.94 GD65232 120 3 5 — ±9, 5 38 20PDIP, 20SOIC, 20SSOP, 20TSSOP 0.29 GD75232 120 3 5 — ±9, 5 30 20PDI
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16 UARTs (Universal Asynchronous Receiver/Transmitters) ‘ preventing system bottlenecks. When a fast To accommodate the requirements of diverse Design Considerations external modem is used, designers should be applications, TI offers a wide portfolio of The UART is a key component of an sure the computer’s UART can handle the parallel-to-serial and serial-to-parallel UARTs asynchronous serial communications system. modem’s maximum transmission rate. For in highly integrated, space-saving conf
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17 UARTs (Universal Asynchronous Receiver/Transmitters) UART Selection Guide Voltage Characterized Device Channel(s) FIFOs (V) Temp. (°C) Package(s) Description Price* Universal Asynchronous Receiver/Transmitters (UARTs) TL16C2550 2 16-Byte 1.8/2.5/3.3/5 –40 to 85 32 QFN, 44 PLCC, Dual UART with Programmable Auto-RTS and Auto-CTS 2.80 48 TQFP TL16C2552 2 16-Byte 1.8/2.5/3.3/5 –40 to 85 32 QFN, 44 PLCC Dual UART with Programmable Auto-RTS and Auto-CTS 3.00 TL16C2752 2 64-Byte 1.8/2.5/3.3/5 — 44 P
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18 CAN (3.3-V and 5-V High-Speed CAN Transceivers) ‘ Electromagnetic Compatibility — An Supply Voltage — In addition to 5-V Design Considerations important requirement for products intended transceivers, TI offers 3.3-V transceivers Bus Protection — Features such as for networking applications is that they that accomplish the same tasks with less short-circuit protection, thermal shutdown behave in a way that does not interfere with than half the power and save on the cost of protection, glit
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™ 19 Flatlink 3G TM FPC cabling typically interconnects the FlatLink 3G – Display SerDes Serializer-Transmitter with the display. for Mobile Phones Compared to parallel signaling, FlatLink 3G FlatLink 3G uses low EMI subLVDS to carry outputs significantly reducing the EMI of the 24-bit color RGB data from applications interconnect by over 20 dB. The electromag- processors, such as OMAP™ from TI, to the Flatlink™ 3G LCD netic emission of the device itself is very low Driver LCD Driver. It caters
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20 SerDes (Serial Gigabit Transceivers and LVDS) ‘ The serial gigabit transceiver family of SerDes Portfolio devices from TI provides low power dissipa- tion while enabling multigigabit transmission General Gigabit 10 Gigabit over copper backplanes, cable and optical EPON LVDS Ethernet/FC Ethernet Purpose links. The transceivers can be used in a TLK3101 TLK1211 TLK1201AI TLK3114SC SN65LVDS93/94 variety of applications, including Gigabit TLK2711 TNETE2201 TLK3104SA SN65LVDS95/96 TLK2701 TLK2208B
