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AVR400 Service Manual Issue 1
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1 2 3 4 5 6 7 8 ECO NR. DATE CHG. ZONE DESCRIPTION OF CHANGE REL. DR. CHK. -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 2 -- -- -- -- -- -- -- -- -- -- F -- -- -- -- -- -- F 3 E E D D C C ITEM NO. PART No. DESCRIPTION QTY 1 TGP3523 / TGP3524 FASCIA ASSEMBLY BLACK / SILVER 1 2 TGP3526 / TGP3527 COVER BLACK / SILVER 1 3 HA4V06S TORX SCREW M4 x 6 4 B B MCM DRAWN BY: 7-9-2010 DATE: A & R CAMBRIDGE LTD 23425 ALL DIMENSIONS IN TOLERANCES UNLESS 0.00± 0.10 MGB CHECKED BY: MI
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1 2 3 4 5 6 7 8 ECO NR. DATE CHG. ZONE DESCRIPTION OF CHANGE REL. DR. CHK. -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- F -- -- -- -- -- -- F ITEM NO. PART No. DESCRIPTION QTY 1 TGP3539 TRANSFORMER - POWER 1 2 FAN 80 x 80 x 25mm 2 3 FAN MOUNTING BRACKET 2 E E 1 D D C C 2 B B 3 MCM DRAWN BY: 7-9-2010 DATE: A & R CAMBRIDGE LTD 23425 ALL DIMENSIONS IN TOLERANCES UNLESS 0.00± 0.10 MGB CHECKED BY: MILLIMETERS UNLESS OTHERWISE STATED 0.0 ± 0.
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1 2 3 4 5 6 7 8 ECO NR. DATE CHG. ZONE DESCRIPTION OF CHANGE REL. DR. CHK. -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- F -- -- -- -- -- -- F SOLDERED TO 5 POWER AMP PCB E E 2 D D ITEM NO. PART No. DESCRIPTION QTY 1 TGP3534 CHASSIS ASSY 1 2 TGP3535 FRONT PCB ASSY 1 3 TGP3538 POWER AMP PCB ASSY 1 3 4 TGP3525 FOOT ASSY 4 5 TGP3540 TRANSFORMER - STANDBY 1 C C 1 B B MCM DRAWN BY: 7-9-2010 DATE: A & R CAMBRIDGE LTD 23425 ALL DIMENSIONS IN TOLER
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1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 ECO NR. DATE CHG. ZONE DESCRIPTION OF CHANGE REL. DR. CHK. ECO NR. DATE CHG. ZONE DESCRIPTION OF CHANGE REL. DR. CHK. -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 5 -- -- -- -- F -- -- -- -- -- -- F F -- -- -- -- -- -- F 6 SOLDERED TO 5 POWER AMP PCB E E E E 2 2 7 ITEM NO. PART No. DESCRIPTION QTY 1 TGP3528 REAR PANEL A
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AVR400 Power Amplifier Circuit Description Apart from the power transformer, the power amplifier electronics is fully contained on the large double sided PTH PCB and heatsink located at the bottom of the AVR400. This is called the Main Board on the schematic diagrams (pages 11 and 12). The Main Board also contains the mains input circuitry, in- cluding the safety fuses and standby power transformer, so great care should be exercised when probing this area of the board. Note that some small su
ページ7に含まれる内容の要旨
additional feedback further reduces high frequency distortion and crossover distortion within the audio band. These stages are partially decoupled from the Vcc and Vee power supplies by D5130/R5130/C5130 and D5129/R5129/C5129 respectively. They are also bootstrapped to the amplifier output via the networks R5118/C5128/R5128 and R5117/C5127/R5127. This raises the supply lines by approximately 3V at full output to avoid clipping the driver stage prematurely. The output stage comprises classic
ページ8に含まれる内容の要旨
1) Any amplifier channel pulls current through the SOA_PROTECT line for long enough to charge up capacitors C5871 and then C5872 so that Q5874 turns on. 2) Any amplifier channel pulls current through the OVERLOAD line for long enough to charge up C5882 and turn on Q5882 and thus Q5884. 3) Any amplifier channel has a large long term (DC) offset (typically greater than +/-3V) sμFficient to charge up C5861 enough to turn on either Q5862 (positive offset) or Q 5864 (negative offset). These then
ページ9に含まれる内容の要旨
Two secondary windings from the toroidal power transformer are fed in via CN63. Pins 1, 2 and 3 con- nect to a centre-tapped secondary winding used to generate approx +/- 20VDC via the bridge rectifier diodes D603/3/4/5 and the 2,200μF 35V reservoir capacitors C609 and C610. R603 and R604 are 0.47R 1W fusible resistors for circuit protection – if they fail replace only with the same type and value. The 3 terminal regulators IC63 and IC62 are mounted on two of the larger heatsinks near the bac
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It communicates with the Input Board via CN101 and a 31 way ribbon cable. Other connectors comprise CN94 which connects to two secondaries of the main power transformer and the hard wired BN93 which connects up the daughter board. There are two associated break off boards. One houses the front panel mounted single pole mains switch plus its suppression capacitor C901 and a connector BN502. The second is mounted on the power amplifiers’ heatsink and is used to route power to the cooling fans
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the same manner as described above for RL902) then the L front input is routed to the low noise micro- phone amplifier IC903. This operates as two cascaded virtual earth amplifiers, each with a voltage gain of approximately 21 (R961/960 and then R965/962). Note the MIC line is biased at +6V via resistors R956, R957 and R958. The amplified signal is output to the Input Board on pin 5 of CON101. AVR400 Input Board Circuit Description The Input Board comprises a 4 layer PCB; this is attached dire
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IC101 has one 8 channel variable level output bus labelled VOL01 through to VOL08. Capacitors C295-8 and C231-4 float the ground ends of the associated internal potentiometers to minimize clicks This bus goes via specially selected 100μF/25V capacitors to the dual op amps IC121-124, wired as voltage follow- ers and running from the +/- 15V supplies. The C, SL, SR, SBL and SBR outputs are shunt muted when required via the 560R resistors R383-388 and the dual transistors Q303-305. The subwoofe
ページ13に含まれる内容の要旨
IC143 is the Cirrus Logic CS42548. It includes an SPDIF receiver, 2 channel ADC and 8 channel DAC. Only one input (pin 43) of the SPDIF receiver is used; the others are grounded. IC143 has +5V analogue supplies, locally decoupled to analogue ground by C721/722 for VA (pin 24) and C703/704 for VARX (pin 41). The digital supply is also +5V, decoupled to digital ground by C705/706 (pin 5) and C750/756 (pin 51). The control port power VLC (pin 6) is 3V3, decoupled to digital ground by C752/773
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IC141 also has two sets of I2S data outputs. DA1 is an 8 channel I2S signal (pins 47, 48, 49 and 51) shown as part of the bus DA0(04:07). This feeds the input of the second DSP IC142 (on pins 23, 24, 26 and 27). The system clock is on pin 52 of IC141 and the LR clock on pin 54. These go to pins 29 and 30 of IC142. DA2 is a stereo I2S output (pin 43 for data, pin 44 for the system clock and pin 46 for the LR clock). This feeds the HDMI board via WF104 and the octal bus switch IC146. The DSP ma
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rogating the USB socket and insertion of a clean USB stick containing only the system firmware will initiate a complete recovery automatically. IC164 is a MiniLogic ML61C282PR precision voltage detector, with a threshold of 2.8V, built in hysteresis and a CMOS output, used to reset IC162 at power on. IC163 is an Intersil USB switch, type ISL54220, which routes the USB socket on the rear panel either to the Venice 6.2 module, for normal audio applications, or to IC162 when the system SW is bei
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the necessary level shifting. IC73 includes internal charge pumps to convert CMOS logic level inputs to +/-5V RS232 level outputs and +/-25V tolerant RS232 inputs to CMOS logic level outputs. Maximum rated speed is 300kb/sec. JK73 is a dual mono 3.5mm jack socket providing two +12V trigger outputs Z_1 and Z_2. The series pass transistors Q712/715 are pnp T0-92 types with emitters referred to the +12V rail via the paralleled 4.7R resistors R714/715 and R711/712. In conjunction with the pairs
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The HDMI input SOC, IC901, is a 144 pin LQFP Analog Devices ADV3014B. This is a 4 into 1 HDMI 1.4a multiplexer and is connected to inputs 4 and 5 (VCR and PVR) on the rear panel (JK95 and JK96). The other two inputs on IC901 are not used. The core power supply is +1.8V and the receiver terminator supply voltage is +3.3V. Note that most power supply decoupling components are on the underside of the PCB. +5V detect and hot plug assert control is carried out by the complementary pairs of switch
ページ18に含まれる内容の要旨
Q914 and Q915 (on the underside of the PCB) send BYPASS_ON and BYPASS_OFF logic signals from IC906 to the array of 4 x 20-bit non-inverting line driver/bμFfers with tri-statable outputs, IC911/912 and IC915/916. These are arranged as a 40 way 2-in, 1-out fast switch to bypass IC906 when required (e.g. if 3D video is present). The video is in 12-bit RGB format and 4 more bμFfers are required for the video clock, H and V syncs and the DE (data enable) line, thus using up all of the available 4
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AVR400 Analogue Video Board This is connected into the rest of the system via the HDMI board using CN301.The circuitry is shown on sheet 13 of the schematic diagram. The purposes of this PCB are: (1) to switch between the various analogue video inputs (comprising 4 each composite and s-video and 3 component video) (2) to route the chosen video signal to the HDMI board for processing (3) to provide one set of zone 1 video component video outputs (4) to provide one zone 2 video output (composit
ページ20に含まれる内容の要旨
6 5 4 3 2 1 FROM POWER TRANS CN94 1 2 3 4 5 FRONT CUP12326Z-1 D D M_GND R903 0 FIP91 CFLHCA16S202T ESD C953 OPEN R977 OPEN JW901 62 61 58 57 56 55 54 53 52 51 50 49 48 7 6 5 2 1 M_GND OPEN R904 D908 OPEN M_GND 3.3 CHGND 2010.04.12 D909 OPEN C903 : 47uF/50V -> 47uF/25V M_GND M_GND M_GND R909 10 Q901 C1027Y 40V 2010.04.12 RC901 C903 : 100uF/63V -> 47uF/63V 2EA R906 C915 0.1uF 1.2K VOUT GND Vcc CUP12326Z-3 1000P C916 1 2 3 FAN C917 1000P REMOTE_IN +5VD FAN GND C918 1000P GND 47 VFD_DATA FAN GND R
