ページ1に含まれる内容の要旨
CY62256
256K (32K x 8) Static RAM
[1]
Features Functional Description
• High speed: 55 ns and 70 ns The CY62256 is a high-performance CMOS static RAM
organized as 32K words by 8 bits. Easy memory expansion is
Voltage range: 4.5V–5.5V operation
provided by an active LOW chip enable (CE) and active LOW
Low active power (70 ns, LL version)
output enable (OE) and three-state drivers. This device has an
— 275 mW (max.)
automatic power-down feature, reducing the power
Low standby power (70 ns,
ページ2に含まれる内容の要旨
CY62256 Pin Configurations 21 A OE 22 0 A 20 1 23 CE 19 I/O A 24 Narrow SOIC 2 7 DIP 18 I/O A 25 6 3 Top View Top View 17 A I/O 26 5 4 16 I/O 27 WE 4 15 I/O TSOP I 3 A 28 V A 28 V V 28 1 1 5 CC CC 5 CC 14 GND A 1 5 Top View A 27 WE 2 A 2 27 WE 13 6 A I/O 6 2 2 6 (not to scale) 12 A 26 A7 3 I/O 3 A 3 26 1 7 A A 4 7 4 11 A I/O 4 0 8 A A 4 A 25 3 A 4 25 8 3 10 8 A A 5 14 9 24 9 A A 24 A 5 A A A 6 13 9 2 5 10 9 2 8 A 7 A 11 12 A 23 A A 23 A 10 6 1 10 6 1 22 A OE 22 A OE 11 7 A 11 7 7 8 A 11 12 21
ページ3に含まれる内容の要旨
CY62256 Electrical Characteristics Over the Operating Range (continued) CY62256−55 CY62256−70 [3] [3] Parameter Description Test Conditions Min. Typ. Max. Min. Typ. Max. Unit I Automatic CE Max. V , CE > V − 0.3V 15 1 5 mA SB2 CC CC Power-down Current— V > V − 0.3V, or V < IN CC IN L250 2 50 µ A CMOS Inputs 0.3V, f = 0 LL 0.1 5 0.1 5 µ A Indust’l Temp Range LL 0.1 10 0.1 10 µ A [4] Capacitance Parameter Description Test Conditions Max. Unit C Input Capacitance T = 25°C, f = 1 MHz, 6 pF IN A
ページ4に含まれる内容の要旨
CY62256 [6] Switching Characteristics Over the Operating Range CY62256−55 CY62256−70 Parameter Description Min. Max. Min. Max. Unit Read Cycle t Read Cycle Time 55 70 ns RC t Address to Data Valid 55 70 ns AA t Data Hold from Address Change 5 5 ns OHA t CE LOW to Data Valid 55 70 ns ACE t OE LOW to Data Valid 25 35 ns DOE [7] t OE LOW to Low-Z 5 5 ns LZOE [7, 8] t OE HIGH to High-Z 20 25 ns HZOE [7] t CE LOW to Low-Z 5 5 ns LZCE [7, 8] t CE HIGH to High-Z 20 25 ns HZCE t CE LOW to Power-up
ページ5に含まれる内容の要旨
CY62256 Switching Waveforms (continued) [12, 13] Read Cycle No. 2 t RC CE t ACE OE t HZOE t DOE t HZCE t LZOE HIGH IMPEDANCE HIGH IMPEDANCE DATA OUT DATA VALID t LZCE t PD t PU V ICC CC SUPPLY 50% 50% CURRENT ISB [9, 14, 15] Write Cycle No. 1 (WE Controlled) t WC ADDRESS CE t t AW HA t t SA PWE WE OE t SD t HD DATA I/O NOTE16 DATA VALID IN t HZOE [9, 14, 15] Write Cycle No. 2 (CE Controlled) t WC ADDRESS t CE SCE t SA t t AW HA WE t t SD HD DATA I/O DATA VALID IN Notes: 13. Address valid pr
ページ6に含まれる内容の要旨
CY62256 Switching Waveforms (continued) [10, 15] Write Cycle No. 3 (WE Controlled, OE LOW) t WC ADDRESS CE t t AW HA t SA WE t t SD HD DATA I/O DATA VALID NOTE 16 IN t t LZWE HZWE Note: 16. During this period, the I/Os are in output state and input signals should not be applied. Document #: 38-05248 Rev. *B Page 6 of 11
ページ7に含まれる内容の要旨
CY62256 Typical DC and AC Characteristics NORMALIZED SUPPLY CURRENT STANDBY CURRENT NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE vs. AMBIENT TEMPERATURE vs. SUPPLY VOLTAGE 1.4 3.0 1.4 I CC 1.2 2.5 1.2 I CC 1.0 1.0 2.0 I SB 0.8 1.5 0.8 µ 1.0 0.6 0.6 V =5.0V IN T =25°C A V =5.0V 0.4 CC 0.5 0.4 V =5.0V IN V =5.0V CC 0.2 0.2 0.0 V =5.0V I IN SB 0.0 0.0 -0.5 −55 25 105 −55 25 125 4.0 4.5 5.0 5.5 6.0 AMBIENT TEMPERATURE (°C) AMBIENT TEMPERATURE (°C) SUPPLY VOLTAGE (V) NORMALIZED ACCESS TIME OU
ページ8に含まれる内容の要旨
CY62256 Typical DC and AC Characteristics (continued) TYPICAL POWER-ON CURRENT TYPICAL ACCESS TIME CHANGE NORMALIZED I vs.CYCLETIME vs. SUPPLY VOLTAGE vs. OUTPUT LOADING CC 3.0 30.0 1.25 2.5 25.0 V =5.0V CC T =25°C A 1.00 2.0 20.0 V =0.5V IN 1.5 15.0 0.75 V =4.5V 1.0 10.0 CC T =25°C A 0.5 5.0 0.0 0.50 0.0 0.0 1.0 2.0 3.0 4.0 5.0 0 200 400 600 800 1000 10 20 30 40 SUPPLY VOLTAGE (V) CAPACITANCE (pF) CYCLE FREQUENCY (MHz) Truth Table CE WE OE Inputs/Outputs Mode Power H X X High-Z Deselect/Po
ページ9に含まれる内容の要旨
CY62256 Package Diagrams 28-lead (600-mil) Molded DIP P15 51-85017-A 28-lead (300-mil) SNC (Narrow Body) SN28 51-85092-*B Document #: 38-05248 Rev. *B Page 9 of 11
ページ10に含まれる内容の要旨
CY62256 Package Diagrams (continued) 28-lead Thin Small Outline Package Type 1 (8 x 13.4 mm) Z28 51-85071-*G 28-lead Reverse Type 1 Thin Small Outline Package (8 x 13.4 mm) ZR28 51-85074-*F All product and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-05248 Rev. *B Page 10 of 11 © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no r
ページ11に含まれる内容の要旨
CY62256 Document Title: CY62256 256K (32K x 8) Static RAM Document Number: 38-05248 Issue Orig. of REV. ECN NO. Date Change Description of Change ** 113454 03/06/02 MGN Change from Spec number: 38-00455 to 38-05248 Remove obsolete parts from ordering info, standardize format *A 115227 05/23/02 GBI Changed SN Package Diagram *B 116506 09/04/02 GBI Added footnote 1. Corrected package description in Ordering Information table Document #: 38-05248 Rev. *B Page 11 of 11
