Samsung MICROCONTROLLERS S3F80P5 user manual

User manual for the device Samsung MICROCONTROLLERS S3F80P5

Device: Samsung MICROCONTROLLERS S3F80P5
Size: 4,22 MB
Date of adding : 2013-12-02 16:17:28
Number of pages: 321
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Samsung MICROCONTROLLERS S3F80P5 user manual
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Abstracts of contents
Summary of the content on the page No. 1



USER’S MANUAL
S3F80P5X
S3F80P5 MICROCONTROLLERS
April 2010
REV 1.00
Confidential Proprietary of Samsung Electronics Co., Ltd
Copyright © 2009 Samsung Electronics, Inc. All Rights Reserved

Summary of the content on the page No. 2

Important Notice The information in this publication has been carefully "Typical" parameters can and do vary in different checked and is believed to be entirely accurate at applications. All operating parameters, including the time of publication. Samsung assumes no "Typicals" must be validated for each customer responsibility, however, for possible errors or application by the customer's technical experts. omissions, or for any consequences resulting from Samsung products are not desig

Summary of the content on the page No. 3

Preface The S3F80P5 Microcontroller User's Manual is designed for application designers and programmers who are using the S3F80P5 microcontroller for application development. It is organized in two main parts: Part I Programming Model Part II Hardware Descriptions Part I contains software-related information to familiarize you with the microcontroller's architecture, programming model, and address spaces. It has three chapters: Chapter 1 Product Overview Chapter 3 Addressing Modes Ch

Summary of the content on the page No. 4

Table of Contents Part I — Programming Model Chapter 1 Product Overview S3C8/S3F8-Series Microcontrollers..............................................................................................................1-1 S3F80P5 Microcontroller...............................................................................................................................1-1 Features ............................................................................................................

Summary of the content on the page No. 5

Table of Contents (Continued) Chapter 3 Addressing Modes Overview .......................................................................................................................................................3-1 Register Addressing Mode (R) ...............................................................................................................3-2 Indirect Register Addressing Mode (IR) .......................................................................................

Summary of the content on the page No. 6

Table of Contents(Continued) Chapter 6 Instruction Set Overview........................................................................................................................................................6-1 Data Types..............................................................................................................................................6-1 Register Addressing...................................................................................................

Summary of the content on the page No. 7

Table of Contents (Continued) Part II Hardware Descriptions Chapter 9 I/O Ports Overview .......................................................................................................................................................9-1 Port Data Registers ................................................................................................................................9-3 Pull-Up Resistor Enable Registers..............................................................

Summary of the content on the page No. 8

Table of Contents (Continued) Chapter 12 Counter A Overview........................................................................................................................................................12-1 Counter A Control Register (CACON) ....................................................................................................12-3 Counter A Pulse Width Calculations.......................................................................................................

Summary of the content on the page No. 9

Table of Contents (Conclude) Chapter 15 Lower Voltage Detector Overview .......................................................................................................................................................15-1 LVD.........................................................................................................................................................15-1 LVD FLAG ..............................................................................................

Summary of the content on the page No. 10

Summary of the content on the page No. 11

List of Figures Figure Title Page Number Number 1-1 Block Diagram (24-pin) ..............................................................................................1-3 1-2 Pin Assignment Diagram (24-Pin SOP/SDIP Package) ............................................1-4 1-3 Pin Circuit Type 1 (Port 0)..........................................................................................1-6 1-4 Pin Circuit Type 2 (Port 1)..........................................................

Summary of the content on the page No. 12

List of Figures (Continued) Figure Title Page Number Number 5-1 S3C8/S3F8-Series Interrupt Types ............................................................................5-2 5-2 S3F80P5 Interrupt Structure.......................................................................................5-3 5-3 ROM Vector Address Area.........................................................................................5-4 5-4 Interrupt Function Diagram.................................

Summary of the content on the page No. 13

List of Figures (Conclude) Figure Title Page Number Number 12-1 Counter A Block Diagram...........................................................................................12-2 12-2 Counter A Control Register (CACON) .......................................................................12-3 12-3 Counter A Registers...................................................................................................12-3 12-4 Counter A Output Flip-Flop Waveforms in Repeat Mode ....

Summary of the content on the page No. 14

Summary of the content on the page No. 15

List of Tables Table Title Page Number Number 1-1 Pin Descriptions of 24-SOP/SDIP..............................................................................1-5 2-1 The Summary of S3F80P5 Register Type .................................................................2-5 4-1 Mapped Registers (Bank0, Set1)...............................................................................4-2 4-1 Mapped Registers (Continued) .............................................................

Summary of the content on the page No. 16

List of Tables(Conclude) Table Title Page Number Number 18-1 Descriptions of Pins Used to Read/Write the Flash ROM..........................................18-3 18-2 Operating Mode Selection Criteria .............................................................................18-4 19-1 Components of TB80PB.............................................................................................19-4 19-2 Setting of the Jumper in TB80PB ..........................................

Summary of the content on the page No. 17

S3F80P5_UM_ REV1.00 PRODUCT OVERVIEW 1 PRODUCT OVERVIEW S3C8/S3F8-SERIES MICROCONTROLLERS Samsung's S3C8/S3F8-series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various flash memory ROM sizes. Important CPU features include: • Efficient register-oriented architecture • Selectable CPU clock sources • Idle and Stop power-down mode release by interrupts • Built-in basic timer with watchdog function A sophisticated

Summary of the content on the page No. 18

PRODUCT OVERVIEW S3F80P5_UM_ REV1.00 FEATURES CPU Back-up Mode • SAM8 RC CPU core • When V is lower than V LVD is ‘ON’ and the DD LVD, chip enters Back-up mode to block oscillation Memory • Program memory: - 18-Kbyte Internal Flash Memory Low Voltage Detect Circuit - 10 years data retention • Low voltage detect to get into Back-up mode and - Endurance: 10,000 Erase/Program cycles Reset - Byte Programmable 1.65V (Typ) ± 50mV - User programmable by ‘LDC’ instruction •

Summary of the content on the page No. 19

S3F80P5_UM_ REV1.00 PRODUCT OVERVIEW BLOCK DIAGRAM (24-PIN PACKAGE) Figure 1-1. Block Diagram (24-pin) 1-3

Summary of the content on the page No. 20

PRODUCT OVERVIEW S3F80P5_UM_ REV1.00 PIN ASSIGNMENTS VDD 1 24 Vss Xin 2 23 P2.0/INT5 22 P3.1/REM/T0CK Xout 3 21 P3.0/T0PWM/T0CAP/T1CAP/T2CAP TEST 4 S3C80P5 20 P1.7 SDAT/P0.0/INT0 5 P1.6 19 SCLK/P0.1/INT1 6 18 P1.5 nRESET/P0.2/INT2 7 24-SOP/SDIP 17 P1.4 P0.3/INT3 8 (TOP VIEW) 16 P1.3 P0.4/INT4 9 15 P1.2 P0.5/INT4 10 P1.1 14 P0.6/INT4 11 P0.7/INT4 12 13 P1.0 Figure 1-2. Pin Assignment Diagram (24-Pin SOP/SDIP Package) 1-4


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