Philips SAA7785 user manual

User manual for the device Philips SAA7785

Device: Philips SAA7785
Category: Computer Hardware
Manufacturer: Philips
Size: 1.14 MB
Added : 5/15/2014
Number of pages: 68
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Abstracts of contents
Summary of the content on the page No. 1

INTEGRATED CIRCUITS
SAA7785
ThunderBird Avenger PCI Audio
Accelerator
Preliminary specification 1999 Nov 12




Summary of the content on the page No. 2

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator IEEE 1394 devices via 14 Channel Virtual Write Master • Superior hardware acceleration for minimum CPU consumption • Broadest API compatibility including TM TM TM DirectSound3D , EAX , and A3D • 64 hardware wavetable polyphony • Professional soft-synth with 256 voice polyphony GENERAL DESCRIPTION and XG support TM The SAA7785 ThunderBird Avenger is a high-perfor- • Second generation ActiMedi

Summary of the content on the page No. 3

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator ORDERING INFORMATION TYPE PACKAGE NUMBER NAME DESCRIPTION VERSION SAA7785 TQFP128 Thin quad flat pack; 128 leads (lead length 1.00 mm); body 25-90040 14 x 14 x 1.00 mm SAA7785 TQFP100 Thin quad flat pack; 100 leads (lead length 1.00 mm); body 25-90042 14 x 14 x 1.00 mm QUICK REFERENCE DATA Condition Symbol Maximum Ratings Ambient Operating Temperature T 0°C to +70°C A Ambient Storage Temperature

Summary of the content on the page No. 4

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator FIGURE 1 BLOCK DIAGRAM AC Link Interface 2 I S 2 I S Interface Port AC LINK S/P DIF S/P DIF Serial Output PCI CFG Configuration Port Headers DSP Interrupt Controller INTRs PCI Legacy DMA Bus PCI Interface Master/Slave DSP Core Interface Test Port SoundBlaster Registers DSP Code Serial INTA# ROM Interrupt Controller OPL3 Registers DSP Code GPIO General RAM Purpose I/O Sample Fetch GamePort Game

Summary of the content on the page No. 5

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator PINNING TM TABLE 1 Signal and Pin Names for 128 pin SAA7785 ThunderBird Avenger PIN PIN NAME # 1 BIT_CLK 33 GNT# 65 AD22 97 AD12 2 SDATA_OUT 34 PME# 66 VDD 98 AD11 3 SDATA_IN0 35 RST# 67 AD21 99 AD10 4 SDATA_IN1 36 VSS 68 AD20 100 NWELL1 5 AC_RST# 37 PCLK 69 AD19 101 PGPIO4 6 VSS 38 PCGNT# 70 VSS 102 AD9 7 JAB1 39 PCREQ# 71 AD18 103 VDD 8 JBB1 40 VDD 72 AD17 104 AD8 9 VDD 41 GNT# 73 AD16 105 VSS

Summary of the content on the page No. 6

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator FIGURE 2 PIN CONFIGURATION TM SAA7785 ThunderBird Avenger PINS ON 128 PIN TQFP PACKAGE DIAGRAM (TOP VIEW). 1 96 AD13 BIT_CLK SDATA_OUT 2 95 VSS SDATA_IN0 3 94 AD14 4 93 AD15 SDATA_IN1 AC_RST# 5 92 C/BE1# VSS 6 91 PAR JAB1 7 90 SERR# 8 89 PERR# JBB1 VDD 9 88 VDD JACX 10 87 PGPIO5 JBCX 11 86 STOP# SAA7785 12 85 DEVSEL# MIDIOUT JBCY 13 84 VSS NWELL 14 83 TRDY# JACY 15 82 VDDIC 16 81 PGPIO6 VSSIC J

Summary of the content on the page No. 7

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator PINNING TM TABLE 2 PIN DEFINITIONS FOR THE 100 Pin SAA7785 ThunderBird Avenger PIN PIN NAME # 1 BIT_CLK 30 PCLK 59 VSS 87 AD5 2 SDATA_OUT 31 PCGNT# 60 C/BE2# 88 VSS 3 SDATA_IN 32 PCREQ# 61 FRAME# 89 AD4 4 AC_RST# 33 GNT# 62 IRDY# 90 AD3 5 VSS 34 VDDIC 63 VDDIC 91 AD2 6 JAB1 35 REQ# 64 TRDY# 92 VSSIC 7 JBB1 36 AD31 65 DEVSEL# 93 AD1 8 JACX 37 AD30 66 STOP# 94 AD0 9 JBCX 38 VDD 67 VDD 95 VDD 10 MI

Summary of the content on the page No. 8

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator TM SAA7785 ThunderBird Avenger pinout for 100 pin package AD13 BIT_CLK 75 1 VSS 74 SDATA_OUT 2 73 AD14 SDATA_IN0 3 AD15 72 AC_RST# 4 71 C/BE1# VSS 5 70 PAR JAB1 6 SERR# 69 JBB1 7 68 PERR# JACX 8 VDD 67 JBCX 9 SAA7785 66 STOP# MIDIOUT 10 65 DEVSEL# JBCY 11 64 TRDY# JACY 12 63 VDDIC VSSIC 13 62 IRDY# JBB2 14 100 PIN TQFP 61 FRAME# 15 JAB2 60 C/BE2# MIDIIN 16 59 VSS VDD 17 58 AD16 18 TRI#/CFGCLK 57

Summary of the content on the page No. 9

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator AC3 data from a DVD directly to an AC3 decoder. FUNCTIONAL OVERVIEW The S/PDIF stereo output capability allows users to connect to a variety of consumer audio equipment, QSound 3D Audio Algorithms such as a stereo receiver, minidisk, or digital 2 speakers. S/PDIF IN support through the I S port QSound Labs most advanced algorithms for 3D enables digital connection from a CD player or other

Summary of the content on the page No. 10

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator total simultaneous voices. TM ActiMedia DSP Architecture TM ActiMedia DSP architecture combines the strengths of programmable and fixed function DSP architectures. Programmability enables custom features, field upgrades, and simple application development, while an array of gate-efficient fixed function DSP processors (accelerators) operate in parallel to provide an excellent price/perform

Summary of the content on the page No. 11

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator Architectural Overview TM The SAA7785 ThunderBird Avenger is a multi-functional device that provides sound processing producing Sound- Blaster-compatible emulation, DirectSound acceleration, 3D sound, spatialization, special effects, and 64-voice wavet- able synthesis through the use of a Pine Digital Signal Processor (DSP) as the primary engine. Included within the 2 ThunderBird Q3DIII are int

Summary of the content on the page No. 12

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator TM The SAA7785 ThunderBird Avenger chip is designed to operate on any PCI system with the proper software sup- (tm) (tm) port. Software support is required for non-DOS applications, such as Windows drivers. Non Pentium based sys- tem can also be supported with the additional software. Systems that provide DDMA or have the ISA bridge on the primary PCI bus are able to perform SoundBlaster emulati

Summary of the content on the page No. 13

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator timer data can be accessed as an I/O device. This timer can be used by game developers to keep track of time elapsed to synchronize the video to the audio stream. The timer can be polled or interrupt driven and is selectable by the user application. DMA DMA is for the Sound Blaster registers, the DSP Mastering Device (DMD), and the S/P DIF output. To cover as many systems as possible, the DMA

Summary of the content on the page No. 14

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator the addresses and fetch the audio samples from system memory. The Address Generator is also capable of looping without intervention from the DSP code. The DSP kills voices by instructing the Address Generator to stop fetching data. Once the samples are fetched, they are stored in the Virtual Register’s input sample buffer for processing by the Sample Fetch Accelerator. Sample Fetch Accelerato

Summary of the content on the page No. 15

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator SERIAL PORT INTERFACES OVERVIEW 2 The SAA7785 chip will contain an S/PDIF Consumer Grade transmit port and an I S transmit/receive pair. These serial ports are designed to exchange digital audio data but can be used for any type of data transfer assuming the bandwidth is adequate. Currently, these ports are connected to the DSP data bus. 2 The Inter-IC Sound Bus, or I S Port, is a simple inter

Summary of the content on the page No. 16

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator 2 FIGURE 4 I S SERIAL PORTS BLOCK DIAGRAM Right Data Transmit Shift XDATA Register Left Data Transmit Control XSCLK Logic XWS 2 I S Ports CCLK Clock Divider RWS Receive Control RSCLK Logic Left Data Receive Shift RDATA Register Right Data DSP DATA BUS 1999 Nov 12 16

Summary of the content on the page No. 17

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator FIGURE 5 S/PDIF TRANSMIT PORT BLOCK DIAGRAM Audio Data Audio Data Holding Shift Registers Registers Validity Bit Generation Aux Data Aux Data Holding Shift Registers Registers Ctl/Channel Ctl/Channel Stat Holding Stat Shift Bi-Phase Line Registers Registers MUX Mark SPDO Driver Encoder User Data User Data Holding Shift Register Register S/PDIF XMT Port Status Register S/PDIF XMT Preamble Contro

Summary of the content on the page No. 18

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator Game Port TM The SAA7785 ThunderBird Avenger Game Port interface is designed to emulate the PC-AT based legacy joystick operation as well as support of a digital joystick mode. The legacy or analog, type of operation is designed to support all legacy software that uses the original joystick address and the method for resolving the joystick axes positions. The Digital Mode is designed to reduc

Summary of the content on the page No. 19

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator SAA7785 SIGNAL DEFINITIONS PCI LOCAL BUS INTERFACE SIGNALS AD[31:0] PCI Address/Data AD[31:0] contains a physical byte address during the first clock of a PCI transaction, and data during subsequent clocks. When the SAA7785 is a PCI master, AD[31:0] are outputs during the address phase of a trans- action. They are either inputs or outputs during the data phase, depending on the type of PCI cy

Summary of the content on the page No. 20

Philips Semiconductors Preliminary Specification TM ThunderBird Avenger PCI Audio SAA7785 Accelerator STOP# PCI Bus Stop (Target Initiated Termination) When the SAA7785 is a PCI master, STOP# is an input which causes the SAA7785 to com- plete, abort or retry the transfer, depending on the state of TRDY# and DEVSEL#. When the SAA7785 is a PCI slave, it drives STOP# as active (LOW) to terminate or retry a transaction. TRDY# PCI Bus Target Ready When the SAA7785 is a PCI master, TRDY# is an input


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