Instrukcja obsługi Fujitsu CS90A

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130nm node CMOS Process (CS90A)
Features
Technology Code CS90A
Transistor UHS HS ST LL
Physical Gate Length (nm) 110 110 110 110
Gate Oxide Thickness (nm) 2.9 2.9 2.9 2.9
Supply Voltage (V) 1.2 1.2 1.2 1.2
NMOS Ids (µA/µm) 780 678 570 390
PMOS Ids (µA/µm) -321 -276 -218 -150
NMOS Ioff (nA/µm) 36 4 0.18 0.005
PMOS Ioff (nA/µm) -18 -3.1 -0.22 -0.015
Mie plant
Gate Leak Current (nA/µm) 0.01 0.01 0.01 0.01
Basic Gate Delay (ps) 14 17 28 45
Number of Available Poly Layer 1
Number of Available Metal L

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130nm node CMOS Process (CS90A) SRAM Transistor 1.65µm 2 Cell Size = 1.98µm (1.2µm x 1.65µm) (2nd Generation SRAM) Interconnect Global Metal: Al AL (Fuse & Pad) Al Pitch: 1.8µm 7-Cu Semi Global Metal: 6-Cu Thick Cu + SiO2 SiLK Pitch: 0.6µm 5-Cu 4-Cu 3-Cu Intermediate Metal: Thin Cu + SiLK 2-Cu Pitch: 0.4µm 1-Cu SiO2 FUJITSU MICROELECTRONICS AMERICA, INC. Corporate Headquarters ©2003 Fujitsu Microelectronics America, Inc. 1250 E. Arques Ave. Sunnyvale, CA 94088-3470 All company and produc