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S3C2440A
32-BIT RISC
MICROPROCESSOR
USER'S MANUAL
PRELIMINARY
Revision 0.14
(June 30, 2004)
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S3C2440A RISC MICROPROCESSOR PRODUCT OVERVIEW 1 PRODUCT OVERVIEW INTRODUCTION This user’s manual describes SAMSUNG's S3C2440A 16/32-bit RISC microprocessor. SAMSUNG’s S3C2440A is designed to provide hand-held devices and general applications with low-power, and high-performance micro- controller solution in small die size. To reduce total system cost, the S3C2440A includes the following components. The S3C2440A is developed with ARM920T core, 0.13um CMOS
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PRODUCT OVERVIEW S3C2440A RISC MICROPROCESSOR FEATURES Architecture NAND Flash Boot Loader • Integrated system for hand-held devices and • Supports booting from NAND flash memory. general embedded applications. • 4KB internal buffer for booting. • 16/32-Bit RISC architecture and powerful • Supports storage memory for NAND flash instruction set with ARM920T CPU core. memory after booting. • Enhanced ARM architecture MMU to support • Supports Advanced NAND flash WinCE, EPOC 32 and Li
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S3C2440A RISC MICROPROCESSOR PRODUCT OVERVIEW FEATURES (Continued) Interrupt Controller gray levels, 256 colors and 4096 colors for STN LCD • 60 Interrupt sources (One Watch dog timer, 5 timers, 9 UARTs, 24 • Supports multiple screen size external interrupts, 4 DMA, 2 RTC, 2 ADC, 1 IIC, – Typical actual screen size: 640x480, 320x240, 2 SPI, 1 SDI, 2 USB, 1 LCD, 1 Battery Fault, 1 160x160, and others. NAND and 2 Camera), 1 AC97 – Maximum frame buffer size is 4 Mbytes. • Level/Edge m
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PRODUCT OVERVIEW S3C2440A RISC MICROPROCESSOR FEATURES (Continued) A/D Converter & Touch Screen Interface • DMA burst4 access support(only word transfer) • 8-ch multiplexed ADC • Compatible with SD Memory Card Protocol version 1.0 • Max. 500KSPS and 10-bit Resolution • Compatible with SDIO Card Protocol version 1.0 • Internal FET for direct Touch screen interface • 64 Bytes FIFO for Tx/Rx Watchdog Timer • Compatible with Multimedia Card Protocol version • 16-bit Watchdog Timer 2.
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S3C2440A RISC MICROPROCESSOR PRODUCT OVERVIEW BLOCK DIAGRAM ARM920T IPA[31:0] Instruction External Instruction CACHE Coproc MMU (16KB) Interface C13 IVA[31:0] ID[31:0] ARM9TDMI AMBA JTAG Processor core CP15 Bus (Internal Embedded ICE) I/F Write DD[31:0] Buffer DVA[31:0] DVA[31:0] C13 Data WriteBack WBPA[31:0] Data CACHE PA Tag MMU (16KB) RAM DPA[31:0] LCD LCD BUS CONT. CONT. DMA Arbitor/Decode A H Interrupt CONT. USB Host CONT. B Power Management ExtMaster B Camera Interface U NAND Ctrl. NAN
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PRODUCT OVERVIEW S3C2440A RISC MICROPROCESSOR PIN ASSIGNMENTS U T R P N M L K J H G F E D C B A 123456789 10 11 12 13 14 15 16 17 BOTTOM VIEW Figure 1-2. S3C2440A Pin Assignments (289-FBGA) 1-6
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S3C2440A RISC MICROPROCESSOR PRODUCT OVERVIEW Table 1-1. 289-Pin FBGA Pin Assignments – Pin Number Order (Sheet 1 of 3) Pin Pin Name Pin Pin Name Pin Pin Name Number Number Number A1 VDDi C1 VDDMOP E1 nFRE/GPA20 A2 SCKE C2 nGCS5/GPA16 E2 VSSMOP A3 VSSi C3 nGCS2/GPA13 E3 nGCS7 A4 VSSi C4 nGCS3/GPA14 E4 nWAIT A5 VSSMOP C5 nOE E5 nBE3 A6 VDDi C6 nSRAS E6 nWE A7 VSSMOP C7 ADDR4 E7 ADDR1 A8 ADDR10 C8 ADDR11 E8 ADDR6 A9 VDDMOP C9 ADDR15 E9 ADDR14 A10 VDDi C10 ADDR21/GPA6 E10 ADDR23/GPA8
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PRODUCT OVERVIEW S3C2440A RISC MICROPROCESSOR Table 1-1. 289-Pin FBGA Pin Assignments – Pin Number Order (Sheet 2 of 3) Pin Pin Name Pin Pin Name Pin Pin Name Number Number Number G1 VSSOP J1 VDDOP L1 LEND/GPC0 G2 CAMHREF/GPJ10 J2 VDDiarm L2 VDDiarm G3 CAMDATA1/GPJ1 J3 CAMCLKOUT/GPJ11 L3 nXDACK0/GPB9 G4 VDDalive J4 CAMRESET/GPJ12 L4 VCLK/GPC1 G5 CAMPCLK/GPJ8 J5 TOUT1/GPB1 L5 nXBREQ/GPB6 G6 FRnB J6 TOUT0/GPB0 L6 VD1/GPC9 G7 CAMVSYNC/GPJ9 J7 TOUT2/GPB2 L7 VFRAME/GPC3 G8 ADDR8 J8 CAMDAT
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S3C2440A RISC MICROPROCESSOR PRODUCT OVERVIEW Table 1-1. 289-Pin FBGA Pin Assignments – Pin Number Order (Sheet 3 of 3) Pin Pin Name Pin Pin Name Pin Pin Name Number Number Number N1 VSSOP R1 VD3/GPC11 U1 VDDiarm N2 VD0/GPC8 R2 VD8/GPD0 U2 VDDiarm N3 VD4/GPC12 R3 VD11/GPD3 U3 VSSOP N4 VD2/GPC10 R4 VD13/GPD5 U4 VSSiarm N5 VD10/GPD2 R5 VD18/SPICLK1/GPD10 U5 VD23/nSS0/GPD15 N6 VD15/GPD7 R6 VD21 /GPD13 U6 I2SSDO/AC_SDATA_OUT N7 VD22/nSS1/GPD14 R7 I2SSCLK/AC_BIT_CLK U7 VSSiarm N8 SDCLK/G
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PRODUCT OVERVIEW S3C2440A RISC MICROPROCESSOR Table 1-2. S3C2440A 289-Pin FBGA Pin Assignments (Sheet 1 of 9) Pin Pin Default I/O State I/O State I/O State I/O Type Number Name Function @BUS REQ @Sleep @nRESET F7 ADDR0/GPA0 ADDR0 Hi-z/– O(L)/– O(L) t10s E7 ADDR1 ADDR1 Hi-z O(L) O(L) t10s B7 ADDR2 ADDR2 Hi-z O(L) O(L) t10s F8 ADDR3 ADDR3 Hi-z O(L) O(L) t10s C7 ADDR4 ADDR4 Hi-z O(L) O(L) t10s D8 ADDR5 ADDR5 Hi-z O(L) O(L) t10s E8 ADDR6 ADDR6 Hi-z O(L) O(L) t10s D7 ADDR7 ADDR7 Hi-z O(L
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S3C2440A RISC MICROPROCESSOR PRODUCT OVERVIEW Table 1-2. S3C2440A 289-Pin FBGA Pin Assignments (Sheet 2 of 9) Pin Pin Default I/O State I/O State I/O State I/O Type Number Name Function @BUS REQ @Sleep @nRESET P16 XP/AIN7 XP –/– –/– AI r10 H6 CAMDATA0/GPJ0 GPJ0 –/– Hi-z/– I t8 G3 CAMDATA1/GPJ1 GPJ1 –/– Hi-z/– I t8 H5 CAMDATA2/GPJ2 GPJ2 –/– Hi-z/– I t8 H4 CAMDATA3/GPJ3 GPJ3 –/– Hi-z/– I t8 H3 CAMDATA4/GPJ4 GPJ4 –/– Hi-z/– I t8 H7 CAMDATA5/GPJ5 GPJ5 –/– Hi-z/– I t8 J8 CAMDATA6/GPJ6 GP
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PRODUCT OVERVIEW S3C2440A RISC MICROPROCESSOR Table 1-2. S3C2440A 289-Pin FBGA Pin Assignments (Sheet 3 of 9) Pin Pin Default I/O State I/O State I/O State I/O Type Number Name Function @BUS REQ @Sleep @nRESET E13 DATA19 DATA19 Hi-z Hi-z,O(L) I b12s E12 DATA20 DATA20 Hi-z Hi-z,O(L) I b12s E16 DATA21 DATA21 Hi-z Hi-z,O(L) I b12s F15 DATA22 DATA22 Hi-z Hi-z,O(L) I b12s G13 DATA23 DATA23 Hi-z Hi-z,O(L) I b12s E17 DATA24 DATA24 Hi-z Hi-z,O(L) I b12s G12 DATA25 DATA25 Hi-z Hi-z,O(L) I b12
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S3C2440A RISC MICROPROCESSOR PRODUCT OVERVIEW Table 1-2. S3C2440A 289-Pin FBGA Pin Assignments (Sheet 4 of 9) Pin Pin Default I/O State I/O State I/O State I/O Type Number Name Function @BUS REQ @Sleep @nRESET T10 EINT16/GPG8 GPG8 –/– Hi-z/– I t8 M11 EINT17/nRTS1/GPG9 GPG9 –/–/– Hi-z/O(H)/– I t8 N10 EINT18/nCTS1/GPG10 GPG10 –/–/– Hi-z/Hi-z/– I t8 U12 EINT19/TCLK1/GPG11 GPG11 –/–/– Hi-z/Hi-z/– I t12 M10 EINT20/GPG12 GPG12 –/– Hi-z/– I t12 T11 EINT21/GPG13 GPG13 –/– Hi-z/– I t12 L11 EI
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PRODUCT OVERVIEW S3C2440A RISC MICROPROCESSOR Table 1-2. S3C2440A 289-Pin FBGA Pin Assignments (Sheet 5 of 9) Pin Pin Default I/O State I/O State I/O State I/O Type Number Name Function @BUS REQ @Sleep @nRESET E3 nGCS7 nGCS7 Hi-z Hi-z,O(H) O(H) t10s D6 nSCAS nSCAS Hi-z Hi-z,O(H) O(H) t10s C6 nSRAS nSRAS Hi-z Hi-z,O(H) O(H) t10s H15 nTRST nTRST I – I is E4 nWAIT nWAIT – Hi-z,O(L) I d2s E6 nWE nWE Hi-z Hi-z,O(H) O(H) t10s J6 TOUT0/GPB0 GPB0 –/– O(L)/– I t8 J5 TOUT1/GPB1 GPB1 –/– O(L)/
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S3C2440A RISC MICROPROCESSOR PRODUCT OVERVIEW Table 1-2. S3C2440A 289-Pin FBGA Pin Assignments (Sheet 6 of 9) Pin Pin Default I/O State I/O State I/O State I/O Type Number Name Function @BUS REQ @Sleep @nRESET A2 SCKE SCKE Hi-z O(L) O(H) t10s B4 SCLK0 SCLK0 Hi-z O(L) O(SCLK) t12s B3 SCLK1 SCLK1 Hi-z O(L) O(SCLK) t12s P7 I2SLRCK/AC_SYNC GPE0 –/– Hi-z/– I t8 R7 I2SSCLK/AC_BIT_CLK GPE1 –/– Hi-z/– I t8 T7 CDCLK/AC_nRESET GPE2 –/– Hi-z/– I t8 L8 I2SSDI/AC_SDATA_IN GPE3 –/–/– Hi-z/Hi-z/– I
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PRODUCT OVERVIEW S3C2440A RISC MICROPROCESSOR Table 1-2. S3C2440A 289-Pin FBGA Pin Assignments (Sheet 7 of 9) Pin Pin Default I/O State I/O State I/O State I/O Type Number Name Function @BUS REQ @Sleep @nRESET N4 VD2/GPC10 GPC10 –/– O(L)/– I t8 R1 VD3/GPC11 GPC11 –/– O(L)/– I t8 N3 VD4/GPC12 GPC12 –/– O(L)/– I t8 P2 VD5/GPC13 GPC13 –/– O(L)/– I t8 M6 VD6/GPC14 GPC14 –/– O(L)/– I t8 P3 VD7/GPC15 GPC15 –/– O(L)/– I t8 R2 VD8/GPD0 GPD0 –/– O(L)/– I t8 M5 VD9/GPD1 GPD1 –/– O(L)/– I t8
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S3C2440A RISC MICROPROCESSOR PRODUCT OVERVIEW Table 1-2. S3C2440A 289-Pin FBGA Pin Assignments (Sheet 8 of 9) Pin Pin Default I/O State I/O State I/O State I/O Type Number Name Function @BUS REQ @Sleep @nRESET A1 VDDi VDDi P P P d12c A10 VDDi VDDi P P P d12c A16 VDDi VDDi P P P d12c A6 VDDi VDDi P P P d12c B11 VDDi VDDi P P P d12c F1 VDDi VDDi P P P d12c F16 VDDi VDDi P P P d12c U11 VDDi VDDi P P P d12c L2 VDDiarm VDDiarm P P P d12c T6 VDDiarm VDDiarm P P P d12c T8 VDDiarm VDDiar
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PRODUCT OVERVIEW S3C2440A RISC MICROPROCESSOR Table 1-2. S3C2440A 289-Pin FBGA Pin Assignments (Sheet 9 of 9) Pin Pin Default I/O State I/O State I/O State I/O Type Number Name Function @BUS REQ @Sleep @nRESET F2 VSSi VSSi P P P si G17 VSSi VSSi P P P si H1 VSSiarm VSSiarm P P P si K1 VSSiarm VSSiarm P P P si T1 VSSiarm VSSiarm P P P si T2 VSSiarm VSSiarm P P P si U10 VSSiarm VSSiarm P P P si U4 VSSiarm VSSiarm P P P si U7 VSSiarm VSSiarm P P P si A11 VSSMOP VSSMOP P P P so A15 V
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S3C2440A RISC MICROPROCESSOR PRODUCT OVERVIEW NOTE: 1. The @BUS REQ. shows the pin state at the external bus, which is used by the other bus master. 2. ' – ‘ mark indicates the unchanged pin state at Bus Request mode. 3. Hi-z or Pre means Hi-z or early state and it is determined by the setting of MISCCR register. 4. AI/AO means analog input/analog output. 5. P, I, and O mean power, input and output respectively. 6. The I/O state @nRESET shows the pin status in the @nRESET duratio
