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SX-560 Embedded Intelligent Module
Developer’s Reference Guide
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© 2008 Silex Technology America, Inc.. All rights reserved. October, 2008 Silex Technology America SPECIFICALLY DISCLAIMS THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS OF THIS PRODUCT FOR A PARTICULAR PURPOSE. Silex shall not be liable for any errors contained in this manual or for any damages resulting from loss of use, data, profits, or any incidental or consequential damages arising from the use of SILEX products or services. The information contained in this documentat
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Contents About This Reference Guide............................................................................................................................................ 1 Safety Precautions........................................................................................................................................................ 1 Emissions Disclaimer..........................................................................................................................
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SNMP Traps, Email Alerts, and GPIO Status........................................................................................................... 36 Chapter 5 Interfacing the SX-560 to the OEM Device ................................................................................................. 37 SX-560 Power Requirements .................................................................................................................................... 41 Installing the SX-560........
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Figures Figure 1 SX-560 top and bottom view............................................................................................................................ 3 Figure 2 Installing SX-560 Module in Evaluation Daughtercard................................................................................... 5 Figure 3 SX-560 Module Inserted in Daughtercard....................................................................................................... 8 Figure 4 Serial Por
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Table 36 Server Information Commands..................................................................................................................... 79 Table 37 Service Commands ....................................................................................................................................... 81 Table 38 SNMP Commands ......................................................................................................................................... 83 Table
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About This Reference Guide This reference guide provides detailed specifications, diagrams and additional information required to integrate the SX-560 embedded intelligent module in a product. The intended audiences are the developers and engineers responsible for the integration of the module in another product. Safety Precautions ! To prevent damage to the SX-560 module’s electronic circuit components, follow established ESD practices and procedures for handling static-sensitive devic
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Page 2 Silex About This Reference Guide Part Number 140-00192-100
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Chapter 1: Introduction The SX-560 embedded intelligent module provides a complete solution for integrating wireless networking technology into virtually any OEM product that has an RS-232 or UART serial port, or a USB V1.1 port. It has a main printed circuit board that contains a processor, memory, flash memory, three (3) serial ports (one dedicated for use as a console) plus a USB V1.1 host port and an SPI port. The wireless LAN functionality is provided through an SDIO 802.11a/b/g ra
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Page 4 silex Introduction Part Number 140-00192-100
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Chapter 2 Installing the Evaluation Daughtercard The SX-560-6900 Evaluation Daughtercard is designed to help you in the development of the necessary hardware and software required to use the SX-560 module. It includes I/O connectors, cables, and power supply in an easy-to-use package. The SX-560 Module is installed in the Evaluation Daughtercard as shown in Figure 2. Figure 2 Installing SX-560 Module in Evaluation Daughtercard Installing the Evaluation Daughtercard Si
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The Evaluation Daughtercard makes it easy to connect to the SX-560 for test and development by providing the following: • Three (3) 9-pin connectors and one (1) 10-pin header for connecting the SX-560 serial ports • One (1) 26-pin header for connecting GPIOs, SPI, power, and ground • One (1) RJ45 Ethernet connector • One power jack • 3 LEDs for displaying the power and network status • 7 LEDs for monitoring the GPIO signals • One (1) Test Button for printing configuration data and re
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Verify Development Kit Contents The SX-560-6900 Evaluation Module Development Kit consists of the components listed in Table 1. Please ensure that all materials listed are present and free from visible damage or defects before proceeding. If anything appears to be missing or damaged, please contact Silex. Table 1 Development Kit Contents Description SX-560-6900 Evaluation Daughtercard 5 VDC 1 Amp Power Supply AC Power Cord for US AC Power Cord for Europe 3 x Serial Null Modem
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Installing the SX-560 Module To install the SX-560 module in the SX-560-6900 Evaluation Daughtercard: 1. Using the 40-pin OEM interface header (JP2), plug the SX-560 Module in the SX-560-6900 Evaluation Daughtercard and secure with screws, nuts and spacers (you may optionally use the metal retaining bracket to secure the radio card and to reduce electromagnetic interference; refer to Chapter 5 for information on using this bracket). Important: The spacers MUST be installed to avoid p
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Monitoring Module Status You can monitor the module status using the yellow, green and orange LED status indicators on the Evaluation Daughtercard. Table 2 defines the default functions of the LED status indicators. Table 2 Status Monitors Function State Status On The module is receiving power Power Off The module is not receiving power Orange (D8) Firmware update is in progress (Important: Do not Blinking power off the module during the update process) Network Status Yellow
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Table 4 OEM Interface Signal Descriptions Signal Pin Type Description GPIO_0, GPIO_1, 2, 3, 4, 7, 8, Input/Output General Purpose Input/Output Signals 0- GPIO_2, GPIO_3, 9, 10, 11, 10, User defined (GPIO_10 is normally GPIO_4, GPIO_5, 12, 13, 15 used for the Test Button and GPIO8- GPIO_6l GPIO_7, GPIO10 are normally used for the status GPIO_8, GPIO_9, LEDs) GPIO_10 RXD0 22 Input Serial Port 1 Receive Data TXD0 14 Output Serial Port 1 Transmit Data RTS0- 20 Output Serial Port 1 Requ
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Power Management The SX-560 power consumption is typically 280mA for wireless-to-serial usage, with a peak consumption is 400mA @ 3.3V. In powersave mode (refer to Chapter 4 for more information) with the SX-560 connected wirelessly to an access point, the consumption is 60mA while idling and an average of about 73mA including wakenings to answer the beacon poll. The above numbers assume that the only active connections are the 802.11 wireless interface and the serial interface (for
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DB-9 RS-232 Signal Type 7 RTS Output (not supported on Serial Port 3) 8 CTS Input (not supported on Serial Port 3) 9 NC Serial Port 1 can also be accessed using logic signals via a 10-pin header located at JP6. If you want to use this header, you must place a jumper on the 2-pin header at JP10 to disable the RS-232 transceiver. The pinouts are as follows: Table 6 Logical Serial Port 1 Signal Descriptions Pin Signal Input/Output Pin Signal Input/Output 1 DCD Input 2 DSR Inpu
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Figure 5 RS-232 Cable Pinouts Table 7 RS-232 Cable Pinout Description Pin Description 1 DCD (Data Carrier Detect) Input* 6 DSR (Data Set Ready) Input* 2 RxD (Receive Data) Input 3 TxD (Transmit Data) Output 4 DTR (Data Terminal Ready) Output* 7 RTS (Request To Send) Output* 8 CTS (Clear To Send) Input* 5 Ground *Note: Serial Port 1 (J3) supports all signals. Serial Port 2 (J4) supports RxD, TxD, RTS, and CTS. Serial Port 3 (J5; dedicated console port) supports RxD and Tx
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JP7 JP8 JP9 Figure 6 GPIO Special Functions Jumpers (Example Configuration) The GPIOs are accessed via header JP3 as described in the next section. You can set and read the GPIO state, and set Email alerts and SNMP traps based on the GPIO state as described in Chapter 6 of this manual. 26-Pin I/O Header The I/O Header, located at JP3, is a 26-pin interface for connecting to the SX-560 GPIO and SPI interfaces. It also provides a direct way of
