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XLi IEEE 1588 Clock
User Guide
997-01510-03, Rev. C, December 2006
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Notices Symmetricom, Inc. Timing Test & Measurement 3750 Westwind Blvd. Santa Rosa, CA 95403-1053 http://www.symmetricom.com Copyright © 2006, Symmetricom, Inc. All rights reserved. Printed in U.S.A. All product names, service marks, trademarks, and registered trademarks used in this document are the property of their respective owners. The manual’s contents do not apply to previously released versions of XLi hardware or software.
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S Table of Contents 1: Overview and Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Standard Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 1588-Related Specifications
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S Configuring the IEEE 1588 Card(s) . . . . . . . . . . . . . . . . . . . . . . . . . 20 PTP Master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 PTP Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Rack Mounting the XLi . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 1 4: User Interfaces . . . . . . . . . . . . . . . . . .
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S F51 – GPS Antenna Cable Delay . . . . . . . . . . . . . . . . . . . . . . . . . . .55 F52 – Distribution Cable Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 F53 – GPS Operation Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 F60 – GPS Receiver Satellite List . . . . . . . . . . . . . . . . . . . . . . . . . . .60 F66 – Daylight Saving Time (DST) Mode . . . . . . . . . . . . . . . . . . .
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S PTP Sync message interval . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 PTP burst mode enabled/disabled . . . . . . . . . . . . . . . . . . . . . . . 121 PTP network port enabled/disabled . . . . . . . . . . . . . . . . . . . . . . 121 PTP subdomain same . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 Reset PTP settings to factory defaults . . . . . . . . . . . . . . . . . . . . 121 1 PTP initializ
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S C: SNMP 151 SymmetricomTtm-SMIv2.mib . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .151 xliMainCard-SMIv2.mib . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .161 xli-SMIv2.mib . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .165 xliSystem-SMIv2.mib . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .165 Editing snmp.conf . . . . . . . . . . . . .
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S 1 viii XLi IEEE 1588 Clock 997-01510-03, Rev. C, 12/12/2006
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S 1: Overview and Features Overview Description The standard XLi IEEE 1588 Clock, also referred to as the “XLi”, provides a complete implementation of 2 a Precise Time Protocol (PTP) “ordinary clock” over a dedicated IEEE 1588 card. The IEEE 1588 card can be configured to operate as a PTP grandmaster or as a PTP slave. As a PTP grandmaster, the IEEE 1588 card typically synchronizes PTP slaves on the network to International Atomic
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S Only the features listed above are supported for the XLi IEEE 1588 clock. At the time of this writing, none of the other options for the XLi Time and Frequency system are supported on the XLi IEEE 1588 clock. Contact Symmetricom Sales to obtain a special supported configuration of the XLi IEEE 1588 clock. For contact information, please see Sales and Customer Assistance (page 197). 1 1588-Related Specifications The specifications
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S Network Port (“1588”) A IEEE1588-compliant “ordinary clock” is available from a stand-alone Ethernet port, labelled “1588”, on the rear panel of the IEEE 1588 card. Type: Standard RJ-45 8-pin connector, 100 Base-T Qty: 1 Packet type Ethernet DIX II (RFC 894) Protocols IPV4, IEEE1588, 802.3, ARP, and PING 2 PPS Output (“SYNC OUT”) A raw unfiltered PPS output is available from the stand-alone BNC connector, labelled “SYNC OUT”, on
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S LEDs The following LEDs are available on the IEEE 1588 card rear panel: • Network Port (1588), Green and Amber LEDs illuminate when receiving or transmitting network 1 traffic. • PPS: LED illuminates (green) while the SYNC OUT signal is high. See “PPS Output (“SYNC OUT”)” on page 3. • TX: LED illuminates (green) with transmission of a PTP packet. • RX: LED illuminates (green) with arrival of a PTP packet. • M/S: 1588 port operatin
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S Specifications Frequency 1575.42 MHz (L1 signal) Code Coarse Acquisition (C/A) code Tracking Up to 12 satellites with TRAIM Position Accuracy Typically < 10m when tracking four (4) satellites TRAIM Mask 1 μS 1 PPS Accuracy UTC-USNO ±30 ns RMS 100 ns Peak Time standard: UTC or GPS 2 Antenna input Female BNC Antenna Power 20 mA – 220 mA, +12 V Related topics: 1 • “Installing the GPS Antenna” on page 15 • “F50 – GPS Receiver LLA/XYZ Po
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S Standard 110 VAC Power Supply The XLi’s internal fault detector can monitor the three output voltages from the primary and the secondary power supplies. With the Primary Power or Secondary Power indicators in F73 enabled, a 10% decrease in any of the output voltages triggers an alarm. See “F73 – Alarm Control / Status” on 1 page 69. Warning: Ensure that a disconnect device, such as a switch, with the appropriate voltage/current r
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S Clock Architecture Figures 1 and 2 on the following pages provide a simplified view of the standard XLi's clock architecture. 16.384 MHz Osc. PLL 2 Aux Ref Aux Ref Phase Measurement 1,5,10 MHz DAC Clock DPLL 1 10 MHz Osc. 200 MHz PLL 1 PPS 1 PPS A Timing Phase Compare 1PPS B Select 5 Time and Clock 1 PPS 1 PPS Out Clock Machine Recovery Output Code Input Code Out Code Input Code Generation Code Out Rate Gen Rate Out Rate Out Figure
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S Display Keypad Oscillator Rb Power 1 Display/Keypad Interface 10 MHz Power, Vc I/O Backplane Interface Power I/O Power I/O Power Supply AC Power Supply Option T&F CPU +5 V, +/- 12 V DC +5 V, +/- 12 V 9-18 VDC 110/220 AC 18-36 VDC User I/O User I/O 36-72 VDC Figure 2: Interface Architecture Block Diagram 8 XLi IEEE 1588 Clock 997-01510-03, Rev. C, 12/12/2006
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S 2: System Specifications Mechanical/Environmental Power: 95-260 VAC, 47 to 440 Hz Operating Temperature: 0 °C to +50 °C (+32 °F to +122 °F) Maximum Rate of Change: 8 °C per hour 2 Storage Temperature: -55 °C to +85 °C (-67 °F to +185 °F) Humidity: To 95% non-condensing Operating Altitude: Maximum 4 km (2.49 mi. or 13147 ft.) Front Panel Display: Vacuum Fluorescent Display (VFD) 4.38” x 0.88" (11.13cm x 2.24 cm). 160X16 pixels. Disp
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S System Time & Frequency Accuracy The tables below describe system clock accuracy while locked to the reference source indicated. Currently, GPS is the only supported reference source. 1 GPS Receiver 1 PPS Output: ±30 ns RMS, 100 ns peak without SA (99%) -12 Frequency Output Accuracy: < 2x 10 -9 Frequency/Timing, Allan 1 x 10 @ 1 sec Deviation, Stability: -10 2 x 10 @ 1000 sec -12 1x 10 @ 1 day AM Code Output Accuracy: 10 μS to the
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S Standard Inputs and Outputs The following specifications describe the standard (as opposed to optional) inputs and outputs on the standard configuration of the XLi. Serial I/O Port The standard serial data port is a bi-directional EIA standard RS-232C interface. The serial data port is configured via the Keypad / Display and Standard network port. 2 Interface: RS-232 or RS-422 Data Rates: 1200, 2400, 4800, 9600 and 19200 bps Data
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SSSS S SS SS S SS SSSS S S S SSSSSSS S S S S S S S S S SS S S S J1 Input – Time Interval - Event Time The Time Interval - Event Time (TIET) option measures a 1 PPS or Event input signal on J1 against the XLi derived time. The rising edge of the pulse is measured against XLi time with 5 ns resolution. 1 Pulse Width 100 ns, min. Active Edge: Rising Amplitude (DC): Logic Low: < 1.25V and Min. 300mV Logic Hi: >1.25V and Max 10V Impedance: 100 kΩ, 50 Ω Resolution: 5 ns, Single Shot Accuracy Refer to
