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Endura KP915GV
Product Manual
www.radisys.com
007-01542-0001 December 2005
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KP915GV Product Manual Copyright © 2005 by RadiSys Technology (Ireland) Ltd. All rights reserved. EPC and RadiSys are registered trademarks of RadiSys Corporation. ASM, Brahma, DAI, DAQ, MultiPro, SAIB, Spirit, and ValuePro are trademarks of RadiSys Corporation. DAVID, MAUI, OS-9, OS-9000, and SoftStax are registered trademarks of RadiSys Microware Communications Software Division, Inc. FasTrak, Hawk, and UpLink are trademarks of RadiSys Microware Communications Software Division, Inc
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KP915GV Product Manual Preface Revision History Revision history No. Date Description 1.0 September 2005 • First Release 2.0 December 2005 • Updates to clarify jumper default positioning, non-support for S/PDIF In and Out on board, BIOS update to P28 version, and editorial changes to some tables. Added details to OEM Features section. No functional changes. Notational Conventions This manual uses the following conventions: • Screen text and syntax strings appear in this
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KP915GV Product Manual Safety and Approval Notices Safety and approval notices Item Description Battery This product contains a lithium cell. • When removing or replacing the lithium cell, do not use a conductive instrument as a short-circuit may cause the cell to explode. Always replace the cell with one of the same type. This product uses a CR2032 cell. Dispose of a spent cell promptly – do not recharge, disassemble or incinerate. Keep cells away from children. • CAUTIO
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KP915GV Product Manual Contents 1 OVERVIEW ................................................................................................................ 10 1.1 Accessories ………………………………………………………………………………………….. 11 1.2 Motherboard Layout................................................................................................................12 1.3 Block Diagram......................................................................................................................
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KP915GV Product Manual 4 MOTHERBOARD BIOS............................................................................................. 51 4.1 BIOS Features ........................................................................................................................51 4.2 Post and Boot ………………………………………………………………………………………..51 4.2.1 Hotkeys ...................................................................................................................................52 4.3 Setup
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KP915GV Product Manual B CONTROL REGISTERS.......................................................................................... 111 B.1 Index Register.......................................................................................................................111 B.2 Watchdog Control .................................................................................................................111 B.3 Watchdog Kick ......................................................
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KP915GV Product Manual Figures Figure 1. KP915GV Board Layout.............................................................................................12 Figure 2. KP915GV Block diagram ...........................................................................................14 Figure 3. Jumpers .....................................................................................................................15 Figure 4. Clocking Block Diagram .......................................
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KP915GV Product Manual Table 34. Complex Programmable Logic Device (CPLD) JTAG Header....................................124 Table 35. Serial Port 2 Header ...................................................................................................124 Table 36. 4 X Internal USB Headers ...........................................................................................124 Table 37. Remote Thermal Sensor..........................................................
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KP915GV Product Manual 1 Overview Target applications are transaction terminals, medical, test & measurement, gaming, industrial automation applications and other enterprise systems. This motherboard is part of the RadiSys Endura product line, which is specifically targeted at embedded applications with a lifetime of 5 years. Products are fully revision controlled and any change to form, fit or function will be notified to customers in advance via a Product Change Notification procedur
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KP915GV Product Manual Product Specification Overview Item Description Network Intel 82573V (or ‘L) PCI-E Gbit Ethernet controller, co-lay with Intel 82562GZ 10/100 PHY (using the integrated MAC) Available with second Intel 82573V (or ‘L) Gbit Ethernet controller Disks Four SATA ports with locking headers Single Ultra ATA/100 interface supporting hard disks and ATAPI drives One FDD interface Super I/O & Nat Semiconductor PC8374K Super I/O and Nat Semiconductor LM9600 H/W Monitor
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KP915GV Product Manual 1.2 Motherboard Layout Figure 1 shows the layout of the KP915GV motherboard with the major components identified. Figure 1. KP915GV Board Layout 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 1 44 2 3 43 4 42 41 5 40 6 39 7 38 8 37 9 36 10 35 11 34 33 12 32 (Optional) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 12
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KP915GV Product Manual Component Identification Description Description Description Ethernet port 1 1 Super IO 21 41 USB port 2 header (option) 2 Memory sockets 22 I/O panel USB port 7 42 USB port 3 header 3 Serial port 2 header 23 I/O panel USB port 8 43 USB port 4 header 4 Remote thermal sensor 24 Microphone input jack 44 SMBus header 5 CPU FAN power 25 Audio line output jack 45 BIOS ROM write- connector protect jumper 6 Chipset GMCH 26 Ethernet controller 1 46 Clear CMOS J
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KP915GV Product Manual 1.3 Block Diagram Figure 2 shows the block diagram of the KP915GV motherboard. Figure 2. KP915GV Block diagram Prescott, Tejas VRD 10.1 Pentium 4 EE 4 Phase PWM LGA775 processor Socket T CK-410 Clock 800/533 FSB CRT Channel A DDR-2 DIMM1 400/533MHz VGA Channel A DDR-2 PCIEx16 Port GMCH DIMM2 Intel SDVO Card Channel B DDR-2 DIMM3 400/533MHz Grantsdale I/O Panel Channel B DDR-2 USB2.0 Port5 DIMM4 USB2.0 Port6 4 Lanes Direct Media Interface (DMI) USB2.0 Port7
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KP915GV Product Manual 1.4 Configuration The majority of the configuration of the motherboard is done through the Setup utility built into the BIOS – discussed later in this document. There are, however, a number of jumpers that control the operation of the motherboard as described below. Some jumpers are not fitted to certain products. Figure 3. Jumpers 1 (No jumper = Recover) JP3 (No jumper = Protected) Normal CPLD Write Enable JP2
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KP915GV Product Manual Recover Mode (No jumper) With no jumper installed on pins 1, 3, and 5 recovery mode is entered. The motherboard does not boot and waits until a valid recovery diskette is detected and then copies new BIOS into the ROM. The motherboard must be powered down and then re-powered with the jumper in the normal position before normal operation can resume. CPLD Write Enabled (Jumper between pins 2 & 4) In this position the contents of the CPLD can be reprogrammed. CPL
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KP915GV Product Manual Tamper Switch To make use of the tamper detection logic of the motherboard, connect a momentary switch between pins 18 and 20. The switch should be open when the chassis is closed. 1.4.5 Alternate Power LED The power LED function on the front panel connector is duplicated on the Alternate Power LED connector for use with LEDs cabled to a 3-pin connector. Do not use both the primary (front panel) and alternate connectors simultaneously. 1.5 Installation of CPU
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KP915GV Product Manual 3. Use thumb & forefinger to hold the hook of the load lever and pull the lever sideways to unlock it. Correct Wrong Warning: DO NOT use finger to lift the locking lever, as injury could occur to the finger and the SKT could be damaged. 4. Lift up the lever. Use thumb to open the load plate. Be careful not to touch the contacts.
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KP915GV Product Manual Alignment key Pin 1 indicator 19
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KP915GV Product Manual 6. Close the load plate, and slightly push down the tongue side. Slightly push down the tongue side 7. Lower the lever and lock it to the load plate, then the CPU is locked in place. CAUTION Excessive temperatures will severely damage the CPU and system. Therefore, you should install CPU cooling fan and make sure that the cooling fan works normally at all times in order to prevent overheating
