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DOCUMENT NUMBER
Freescale Semiconductor, Inc.
S12EETX4KV0
EETX4K
Block Guide
V00.04
Original Release Date: 7 JUL 2003
Revised: 30 OCT 2003
Motorola, Inc.
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its
products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically di
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Revision History 2 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Table of Contents Section 1 Introduction 1.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1.1.1 Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 4.4 Background Debug Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 4.5 EEPROM Module Security . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 4.5.1 Unsecuring the MCU in Special Single Chip Mode via the BDM . . . . . . . . . . . . . 40 4.6 Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 List of Figures Figure 1-1 Module Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 3-1 EEPROM Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 3-2 EEPROM Clock Divider Register (ECLKDIV) . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 3-3 RESERVED1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 6 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 List of Tables Table 3-1 EEPROM Configuration Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 3-2 EEPROM Register Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 3-3 EEPROM Protection Address Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 3-4 Valid EEPROM Command List . . . . . . . . . . . . . . . . . . . . . .
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 8 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 9 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 10 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Section 1 Introduction 1.1 Overview This document describes the EETX4K module which includes a 4K byte EEPROM (Non-Volatile) memory. The EEPROM memory may be read as either bytes, aligned words or misaligned words. Read access time is one bus cycle for bytes and aligned words, and two bus cycles for misaligned words. The EEPROM memory is ideal for data storage for single-supply applications allowing for field reprogramming wi
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 1.4 Block Diagram A block diagram of the EEPROM module is shown in Figure 1-1. EETX4K EEPROM Interface Command Interrupt Command Pipeline Request EEPROM cmd1 cmd2 addr1 addr2 2K * 16 Bits data1 data2 sector 0 sector 1 Registers Protection sector 1023 Oscillator Clock Clock Divider EECLK Figure 1-1 Module Block Diagram 12 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Section 2 External Signal Description 2.1 Overview The EEPROM module contains no signals that connect off-chip. 13 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Section 3 Memory Map and Registers 3.1 Overview This section describes the memory map and registers for the EEPROM module. 3.2 Module Memory Map A linear EEPROM memory map is shown in Figure 3-1. The HCS12X architecture actually places the EEPROM memory addresses between logical addresses $0800 and $1000 with $0800 to $0BFF representing 1K byte of paged EEPROM memory and $0C00 to $0FFF representing 1K byte of fixed EEPROM me
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 ADDRESS OFFSET = $_00 EEPROM Registers 12 bytes ADDRESS OFFSET = $_0B EEPROM BASE + $_000 EEPROM Memory 3584 bytes (up to 4032 bytes) + $_E00 + $_E40 + _$E80 + $_EC0 EEPROM Memory Protected Region + $_F00 64, 128, 192, 256, 320, 384, 448, 512 bytes + $_F40 + $_F80 + $_FC0 EEPROM Configuration Field EEPROM BASE + $_FFF 16 bytes ($_FFC - $_FFF) Figure 3-1 EEPROM Memory Map 15 For More Information On This Product, Go to: www.
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 The EEPROM module also contains a set of 12 control and status registers located between EEPROM register address offsets $_00 and $_0B. A summary of the EEPROM module registers is given in Table 3-2 while their accessibility is detailed in section 3.3. Table 3-2 EEPROM Register Map Address Normal Mode Register Name Offset Access $_00 EEPROM Clock Divider Register (ECLKDIV) R/W 1 $_01 R RESERVED1 1 $_02 R RESERVED2 $_03 EEPROM
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 3.3 Register Descriptions 3.3.1 ECLKDIV — EEPROM Clock Divider Register The ECLKDIV register is used to control timed events in program and erase algorithms. Address Offset: $_00 7 6 5 4 3 2 1 0 R EDIVLD PRDIV8 EDIV5 EDIV4 EDIV3 EDIV2 EDIV1 EDIV0 W RESET: 0 0 0 0 0 0 0 0 = Unimplemented or Reserved Figure 3-2 EEPROM Clock Divider Register (ECLKDIV) All bits in the ECLKDIV register are readable, bits 6-0 are write once and bi
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 3.3.3 RESERVED2 This register is reserved for factory testing and is not accessible. Address Offset: $_02 76543210 R 00000000 W Reset: 00000000 = Unimplemented or Reserved Figure 3-4 RESERVED2 All bits read zero and are not writable. 3.3.4 ECNFG — EEPROM Configuration Register The ECNFG register enables the EEPROM interrupts. Address Offset: $_03 76543210 R 000000 CBEIE CCIE W Reset: 00000000 = Unimplemented or Reserved Figure
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 3.3.5 EPROT — EEPROM Protection Register The EPROT register defines which EEPROM sectors are protected against program or erase operations. Address Offset: $_04 7 6 543210 R RNV6 RNV5 RNV4 EPOPEN EPDIS EPS2 EPS1 EPS0 W Reset: F F FFFFFF = Unimplemented or Reserved Figure 3-6 EEPROM Protection Register (EPROT) All bits in the EPROT register are readable and writable except for RNV[6:4] which are only readable. The EPOPEN and E
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Freescale Semiconductor, Inc. Block Guide — S12EETX4KV0 V00.04 Table 3-3 EEPROM Protection Address Range Address Offset EPS[2:0] Protected Size Range 000 $_FC0-$_FFF 64 bytes 001 $_F80-$_FFF 128 bytes 010 $_F40-$_FFF 192 bytes 011 $_F00-$_FFF 256 bytes 100 $_EC0-$_FFF 320 bytes 101 $_E80-$_FFF 384 bytes 110 $_E40-$_FFF 448 bytes 111 $_E00-$_FFF 512 bytes 3.3.6 ESTAT — EEPROM Status Register The ESTAT register defines the operational status of the module. Address Offset: $_05 765 4 3210
