Motorola IC-T81Aの取扱説明書

デバイスMotorola IC-T81Aの取扱説明書

デバイス: Motorola IC-T81A
カテゴリ: 海洋ラジオ
メーカー: Motorola
サイズ: 2.46 MB
追加した日付: 10/19/2013
ページ数: 53
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内容要旨
ページ1に含まれる内容の要旨

SERVICE
MANUAL
MULTIBAND FM TRANSCEIVER

ページ2に含まれる内容の要旨

INTRODUCTION This service manual describes the latest service information for the at the time of publication. IC-T81A/E MODEL VERSION SYMBOL U.S.A. USA-1 IC-T81A Australia AUS S.E.Asia SEA Europe EUR IC-T81E U.K. UK Italy ITA To upgrade quality, all electrical or mechanical parts and internal circuits are subject to change without notice or obligation. DANGER NEVER connect the transceiver to an AC outlet or to a DC power supply that uses more than 16 V. Such a connection could cause a fire haza

ページ3に含まれる内容の要旨

TABLE OF CONTENTS SECTION 1 SPECIFICATIONS SECTION 2 INSIDE VIEWS SECTION 3 DISASSEMBLY INSTRUCTIONS SECTION 4 CIRCUIT DESCRIPTION 4-1 RECEIVER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1 4-2 TRANSMITTER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-3 4-3 PLL CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ページ4に含まれる内容の要旨

SECTION 1 SPECIFICATIONS M GENERAL • Frequency range : Version 50 MHz 145 MHz 440 MHz 1200 MHz 91.5 MHz (RX only) 3 TX: 144 – 148 TX: 430 – 450* 4 U.S.A. 1240 – 1300 76 – 107.995* 50 – 53.995 1 3 RX: 118 – 173.995* RX: 400 – 469.995* 4 Australia 50 – 53.995 144 – 148 430 – 440 1240 – 1300 88 – 107.995* 1 TX: 136 – 173.995* 2 4 S.E.Asia 400 – 469.995* 1240 – 1300 76 – 107.995* 50 – 53.995 1 RX: 118 – 173.995* 4 Europe, U.K. 50 – 52 144 – 146 430 – 440 1240 – 1300 88 – 107.995* 1 TX: 136 – 173.995

ページ5に含まれる内容の要旨

M RECEIVER • Receiver system : Double-conversion superheterodyne • Intermediate frequency : 1st 69.45 MHz (13.35 MHz: WFM) 2nd 450 kHz • Sensitivity* : (except spurious points; typical values) Band FM AM WFM 50 MHz 0.18 µV 0.56 µV – 144 MHz – – 0.18 µV 440 MHz 0.18 µV – – 1200 MHz – – 0.25 µV 91.5 MHz – 2.0 µV – * FM and WFM are measured at 12 dB SINAD, AM is measured at 10 dB S/N. • Squelch sensitivity : 50, 144, 440 MHz Less than 0.18 µV (Threshold) 1200 MHz Less than 0.25 µV (Threshold) AM (

ページ6に含まれる内容の要旨

SECTION 2 INSIDE VIEWS LOGIC UNIT • BOTTOM VIEW Crystal filter (X1: CR-639 5.039MH) CPU (IC1: M38267M8LGP) AF mute switch (Q361: 2SJ364) AF volume (IC202: M5222FP) AF power amplifier IF IC (IC201: TA7368F) (IC701: TA31136FN) RF UNIT • BOTTOM VIEW TOP VIEW Power amplifier (Q922: 2SK3075) Drive amplifier (Q921: MRF9745) APC sensor drive amplifier Q911: UN9215 ( ) Q913: XP6401 APC control WFM RF circuit amplifier circuit 1st mixer (IC601: μPC2757T) PLL IC (IC801: μPD3140G) VCO circuit 2 - 2

ページ7に含まれる内容の要旨

SECTION 3 DISASSEMBLY INSTRUCTIONS REMOVING THE CHASSIS PANEL • REMOVING THE SHIELD PLATE • 1 Remove 1 knob A, and unscrew 1 nut B. 1 Unsolder 10 points, F, to separate the shield plate and 2 Unscrew 2 screws C. LOGIC unit. 3 Remove the chassis panel in the direction of the arrow. F Shield plate B Chassis panel C A F F LOGIC unit REMOVING THE LOGIC UNIT REMOVING THE RF UNIT • • 1 Remove the sealing rubber. 1 Unsolder 1 point, G, to separate [ANT] plug. 2 Unsolder 1 point, D, to separate a SENSOR

ページ8に含まれる内容の要旨

SECTION 4 CIRCUIT DESCRIPTION Thus, transmit signals are blocked from entering the receiv- 4-1 RECEIVER CIRCUITS er circuits. The antenna switching circuit employs a 1/4l 4-1-1 DUPLEXER CIRCUIT (RF UNIT) type diode switching system. The passed signals are then The transceiver has a duplexer (low-pass and high-pass fil- applied to each RF amplifier circuit. ters) on the frist stage from the antenna connector to sepa- rate the signals into below UHF and SHF signals. The high- pass filter (L51–L55,

ページ9に含まれる内容の要旨

• RF signals WFM band • 50, 144, 440 and 1200 MHz band The WFM band signals are applied to the RF amplifier The applied RF signals are mixed with 1st LO signals at the (Q201) via the tunable band-pass filter (D202). The ampli- 1st mixer (IC601) to produce a 69.45 MHz 1st IF signal. The fied signals pass through the tunable bandpass filter (D203), 1st IF signal is output from the 1st mixer (IC601, pin 6), and and are then applied to the 1st mixer circuit (IC601, pin 1). then passed through the cr

ページ10に含まれる内容の要旨

4-1-8 2ND IF AND DEMODULATOR CIRCUITS Even when the squelch is closed, the AF mute switch (Q361) opens at the moment of emitting beep tones. (RF AND LOGIC UNITS) The 2nd mixer circuit converts the 1st IF signal to the 2nd IF • TONE SQUELCH signal. A double conversion superheterodyne system (which The tone squelch circuit detects AF signals and opens the converts receive signals twice) improves the image rejection squelch only when receiving a signal containing a matching ratio and obtain stable

ページ11に含まれる内容の要旨

The amplified signal is passed through the antenna switch- (3) 440 MHz band ing circuit (D101 and D102), low-pass filters and high-pass The signals from the limiter amplifier (RF unit; IC301) filters. The signal is applied to the antenna connector. changes the reactance of a diode (VCO unit; D321) to mod- ulate the oscillated signal at the 440-VCO circuit (VCO unit; (3) 440 MHz PA Q321, Q322, D321, D322, L322). The modulated signals are amplified at the buffer-amplifier (Q323) and the LO amplifi

ページ12に含まれる内容の要旨

The APC sensor (R911) detects driving current from the The applied signal is divided by serial data from the CPU (N- drive voltage at the YGR (Q138), drive (Q921) and power data) and phase-detected with the divided reference fre- (Q922) amplifiers. The detected current is converted into DC quency (5 kHz) at the phase detector section in the PLL IC. voltage at Q913, then applied to the APC control circuit The phase-detected signal is output from IC801 (pin 13) and (IC901, pin 2). The applied volt

ページ13に含まれる内容の要旨

4-5 PORT ALLOCATIONS 4-5-2 I/O EXPANDER IC (RF UNIT; IC3) 4-5-1 I/O EXPANDER IC (RF UNIT; IC2) Pin Port Pin Port Description Description number name number name Outputs VHVCO3 regulator control Outputs 300 MHz band RX regulator 4 Q1 4 Q1 signal. control signal. Outputs VLVCO3 regulator control Outputs AM mode regulator control 5 Q2 6 Q3 signal. signal. Outputs 6MVCO3 regulator control Outputs WFM band RX switching con- 6 Q3 7 Q4 signal. trol signal. Outputs VCO shift signal for SHF, Outputs WFM

ページ14に含まれる内容の要旨

4-5-3 CPU (LOGIC UNIT; IC1) Pin Port Pin Port Description Description number name number name Input port for the over-voltage detec- 20 CLONEIN Input port for the cloning signal. 1 VIN tion from connected battery pack or Outputs T4 regulator control signal. external power supply. 21 TXC High : While transmitting. Input port for remote control signals Outputs R3 regulator control signal. 2 REMOTE from an optional HM-75A microphone 22 R3C High : While receiving. via the [MIC] jack. Input port for

ページ15に含まれる内容の要旨

SECTION 5 ADJUSTMENT PROCEDURES 5-1 PREPARATION Ô Ô REQUIRED TEST EQUIPMENT EQUIPMENT GRADE AND RANGE EQUIPMENT GRADE AND RANGE Output voltage : 13.5 V DC DC voltmeter Input impedance : 50 kΩ/V DC or better DC power supply Current capacity : 3 A or more Frequency range : 300–3000 Hz Audio generator Measuring range : 1–10 W Measuring range : 1–500 mV RF power meter Frequency range : 28–1500 MHz Frequency range : 28–1300 MHz (terminated type) Impedance : 50 Ω Standard signal Output level : 0.1 µV

ページ16に含まれる内容の要旨

5-2 PLL ADJUSTMENT The following adjustment must be performed at “ADJUSTMENT MODE”. ADJUSTMENT MEASUREMENT POINT ADJUSTMENT ADJUSTMENT CONDITION VALUE UNIT LOCATION UNIT ADJUST PLL LOCK 1 • Displayed frequency : RF Connect the DC 0.8 V – 1.8 V Verify VOLTAGE 51.000 MHz voltmeter or an • Receiving oscilloscope to VLV. 2 • Transmitting Connect the DC 1.8 V – 2.8 V voltmeter or an oscilloscope to 6MLV. 3 • Displayed frequency : Connect the DC 1.4 V – 2.4 V 88.000 MHz voltmeter or an • Receiving osc

ページ17に含まれる内容の要旨

• RF UNIT BOTTOM VIEW 12LV PLL lock voltage check point (for 1200 MHz) ULV PLL lock voltage check point (for 440 MHz) VLV PLL lock voltage check point (for 50 MHz RX, WFM and 144 MHz) • RF UNIT TOP VIEW 6MLV PLL lock voltage check point (for 50 MHz TX) • LOGIC UNIT TOP VIEW L702 Detector Output voltage adjustment Q Detector Output voltage check point 5 - 3

ページ18に含まれる内容の要旨

5-3 RECEIVER ADJUSTMENT The following adjustment must be performed at “ADJUSTMENT MODE”. ADJUSTMENT MEASUREMENT POINT ADJUSTMENT ADJUSTMENT CONDITION VALUE UNIT LOCATION UNIT ADJUST 50 MHz 1 • Displayed frequency : LOGIC Connect a multime- Maximum voltage Top [DIAL] SENSITIVITY 50.000 MHz ter to check point panel • Connect an SSG to the antenna SD. connector and a SINAD meter with an 8 Ω load to the [SP] jack. • Set an SSG as : Level : 1 µV* (–107 dBm) Deviation : ± 3.5 kHz Modulation : 1 kHz •

ページ19に含まれる内容の要旨

• LOGIC UNIT TOP VIEW SD 50 MHz, WFM BAND, AIR BAND and 145 MHz Sensitivity check point 5 - 5

ページ20に含まれる内容の要旨

RECEIVER ADJUSTMENT (Continued) The following adjustment must be performed on the normal mode after “SENSITIVITY ADJUSTMENT” in SECTION 5-3. MEASUREMENT ADJUSTMENT ADJUSTMENT ADJUSTMENT CONDITION VALUE UNIT LOCATION S-METER 1 • Displayed frequency : Top Push and hold 51.000 MHz [EUR], [UK], [ITA] panel the [SQL] key (50 MHz band) 52.000 MHz [AUS], [SEA], [USA-1] • Connect the SSG to the antenna connector and set as: Level : 1 µV* (– 107 dBm) Modulation : 1 kHz Deviation : ± 3.5 kHz • Connect a t


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