Maxim MAX9778の取扱説明書

デバイスMaxim MAX9778の取扱説明書

デバイス: Maxim MAX9778
カテゴリ: ステレオアンプ
メーカー: Maxim
サイズ: 1.23 MB
追加した日付: 2/27/2013
ページ数: 27
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要旨

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内容要旨
ページ1に含まれる内容の要旨

MAX9777/MAX9778
µ
19-0509; Rev 0; 4/06
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
General Description Features
♦ Industry-Leading, Ultra-High 100dB PSRR
The MAX9777/MAX9778 combine a stereo 3W bridge-
tied load (BTL) audio power amplifier, stereo single-
♦ 3W BTL Stereo Speaker Amplifier
ended (SE) headphone amplifier, headphone sensing,
♦ 200mW Stereo Headphone Amplifier
and a 2:1 input multiplexer all in a tiny 28-pin thin QFN
♦ Low 0.002% THD+N
package. These devices

ページ2に含まれる内容の要旨

Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux A AB BS SO OL LU UT TE E M MA AX XIIM MU UM M R RA AT TIIN NG GS S V to GND ...........................................................................+6V Continuous Power Dissipation (T = +70°C) DD A PV to V .......................................................................±0.3V 28-Pin TQFN, Multilayer Board DD DD PGND to GND.....................................................................±0.3V (derate 34.5mW/°C abo

ページ3に含まれる内容の要旨

MAX9777/MAX9778 Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux ELECTRICAL CHARACTERISTICS (continued) (V = PV = 5.0V, GND = PGND = 0V, V = 5V, C = 1µF, R = R = 15k Ω, R = ∞. T = T to T , unless otherwise DD DD SHDN BIAS IN F L A MIN MAX noted. Typical values are at T = +25°C.) (Note 1) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS OUTPUT AMPLIFIERS (HEADPHONE MODE, HPS = V ) DD V = 4.5V to 5.5V 75 106 DD Power-Supply Rejection Ratio PSRR f = 1kHz, V = 200mV 88 dB RIPPLE P-

ページ4に含まれる内容の要旨

Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux ELECTRICAL CHARACTERISTICS (continued) (V = PV = 5.0V, GND = PGND = 0V, V = 5V, C = 1µF, R = R = 15k Ω, R = ∞. T = T to T , unless otherwise DD DD SHDN BIAS IN F L A MIN MAX noted. Typical values are at T = +25°C.) (Note 1) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 2-WIRE SERIAL INTERFACE (SCL, SDA, ADD, INT) (MAX9777) Input-Voltage High V 2.6 V IH Input-Voltage Low V 0.8 V IL Input Hysteresis 0.2 V Input High Leakage Curr

ページ5に含まれる内容の要旨

MAX9777/MAX9778 Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Typical Operating Characteristics (V = PV = 5V, GND = PGND = 0V, V = 5V, C = 1µF, T = +25°C, unless otherwise noted.) DD DD SHDN BIAS A TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (SPEAKER MODE) vs. FREQUENCY (SPEAKER MODE) vs. FREQUENCY (SPEAKER MODE) 1 1 1 R = 3Ω L R = 4Ω L R = 3Ω L A = 4V/V A = 2V/V V V A = 2V/V V 0.1 0.1 0.1 P =

ページ6に含まれる内容の要旨

Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Typical Operating Characteristics (continued) (V = PV = 5V, GND = PGND = 0V, V = 5V, C = 1µF, T = +25°C, unless otherwise noted.) DD DD SHDN BIAS A TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (SPEAKER MODE) vs. OUTPUT POWER (SPEAKER MODE) vs. OUTPUT POWER (SPEAKER MODE) 100 100 100 A = 4V/V A = 2V/V V A = 4V/V V V R = 4Ω R = 8Ω L L R = 8Ω L 10 1

ページ7に含まれる内容の要旨

MAX9777/MAX9778 Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Typical Operating Characteristics (continued) (V = PV = 5V, GND = PGND = 0V, V = 5V, C = 1µF, T = +25°C, unless otherwise noted.) DD DD SHDN BIAS A POWER-SUPPLY REJECTION RATIO CROSSTALK vs. FREQUENCY vs. FREQUENCY (SPEAKER MODE) (SPEAKER MODE) 40 -40 V = 200mV V = 200mV RIPPLE P-P IN P-P -50 R = 8Ω L 50 -60 60 -70 RIGHT TO LEFT 70 -80 -90 80 -100 LEFT TO RIGHT 90 -110 100 -120 10 100 1k 10k 100k 10 100 1k 10k 1

ページ8に含まれる内容の要旨

Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Typical Operating Characteristics (continued) (V = PV = 5V, GND = PGND = 0V, V = 5V, C = 1µF, T = +25°C, unless otherwise noted.) DD DD SHDN BIAS A TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (HEADPHONE MODE) vs. OUTPUT POWER (HEADPHONE MODE) vs. FREQUENCY (HEADPHONE MODE) 100 1 1 A = 1V/V R = 32Ω V R = 32Ω L L R = 16Ω A = 1V/V A = 2V/V L V V 10 0.

ページ9に含まれる内容の要旨

MAX9777/MAX9778 Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Typical Operating Characteristics (continued) (V = PV = 5V, GND = PGND = 0V, V = 5V, C = 1µF, T = +25°C, unless otherwise noted.) DD DD SHDN BIAS A POWER DISSIPATION vs. OUTPUT POWER POWER-SUPPLY REJECTION RATIO POWER DISSIPATION vs. OUTPUT POWER (HEADPHONE MODE) (HEADPHONE MODE) vs. FREQUENCY (HEADPHONE MODE) 70 40 120 V = 200mV RIPPLE P-P 60 100 50 50 60 80 40 70 60 30 40 80 20 90 20 10 R = 32Ω L R = 16Ω L f =

ページ10に含まれる内容の要旨

Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Typical Operating Characteristics (continued) (V = PV = 5V, GND = PGND = 0V, V = 5V, C = 1µF, T = +25°C, unless otherwise noted.) DD DD SHDN BIAS A SUPPLY CURRENT vs. SUPPLY VOLTAGE SUPPLY CURRENT vs. SUPPLY VOLTAGE (HEADPHONE MODE) (HEADPHONE MODE) 12 12 10 10 T = +85°C T = +85°C A A 8 8 6 6 T = +25°C A T = +25°C A 4 4 T = -40°C A T = -40°C A 2 2 0 0 4.50 4.75 5.00 5.25 5.50 4.50 4.75 5.00 5.25 5.50 SUPPLY VOLTAGE (V) SUPPLY V

ページ11に含まれる内容の要旨

MAX9777/MAX9778 Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Pin Description PIN NAME FUNCTION MAX9777 MAX9778 1 — SDA Serial Data I/O 2— INT Interrupt Output 3, 4 3, 4 V Power-Supply Input DD 5 5 INL1 Left-Channel Input 1 6 6 INL2 Left-Channel Input 2 7 7 GAINLA Left-Channel Gain Set A 8 8 GAINLB Left-Channel Gain Set B 9, 13, 23, 27 9, 13, 23, 27 PGND Power Ground. Connect to GND. Left-Channel Bridged Amplifier Positive Output. OUTL+ also serves as the 10 10 OUTL+ left-c

ページ12に含まれる内容の要旨

Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Input Multiplexer Detailed Description Each amplifier features a 2:1 input multiplexer, allowing The MAX9777/MAX9778 feature 3W BTL speaker input selection between two stereo sources. Both multi- amplifiers, 200mW headphone amplifiers, input multi- plexers are controlled by bit 1 in the control register plexers, headphone sensing, and comprehensive click- (MAX9777) or by the IN1/2 pin (MAX9778). A logic-low and-pop suppression.

ページ13に含まれる内容の要旨

MAX9777/MAX9778 Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Table 1b. MAX9778 HPS Setting V DD INPUTS R1 MODE GAIN PATH* 680kΩ HPS_EN HPS R3 MAX9777 47kΩ MAX9778 0 X BTL A or B HPS 1 0 BTL A or B 1 1 SE A or B OUTL+ *Note: OUTR+ A or B—Gain path selected by external GAINAB R2 R2 10kΩ 10kΩ Headphone Sense Input (HPS) With headphone sense enabled, a voltage on HPS less than 0.7 x V sets the device to speaker mode. A volt- DD Figure 2. HPS Configuration Circuit age greater t

ページ14に含まれる内容の要旨

Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Digital Interface devices from high-voltage spikes on the bus lines, and 2 The MAX9777 features an I C/SMBus™-compatible 2- minimize crosstalk and undershoot of the bus signals. wire serial interface consisting of a serial data line Bit Transfer (SDA) and a serial clock line (SCL). SDA and SCL facili- One data bit is transferred during each SCL clock tate bidirectional communication between the cycle. The data on SDA must remain

ページ15に含まれる内容の要旨

MAX9777/MAX9778 Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Early STOP Conditions Acknowledge Bit (ACK) The MAX9777 recognizes a STOP condition at any The acknowledge bit (ACK) is the ninth bit attached to point during the transmission except if a STOP condi- any 8-bit data word. The receiving device always gen- tion occurs in the same high pulse as a START condi- erates ACK. The MAX9777 generates an ACK when 2 tion (Figure 5). This condition is not a legal I C format; re

ページ16に含まれる内容の要旨

Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Write Data Format in bit 0 of the SHDN register shuts down the device; a There are three registers that configure the MAX9777: logic-low turns on the device. A logic-high is required in the MUTE register, SHDN register, and control register. bits 2 to 7 to reset all registers to their default settings. In write data mode (R/W = 0), the register address and Control Register data byte follow the device address (Figure 7). The cont

ページ17に含まれる内容の要旨

MAX9777/MAX9778 Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Read Data Format Table 5. MAX9777 Control Register Format In read mode (R/W = 1), the MAX9777 writes the con- REGISTER ADDRESS 0000 0011 tents of the selected register to the bus. The direction of BIT NAME VALUE DESCRIPTION the data flow reverses following the address acknowl- edge by the MAX9777. The master device reads the 7 X Don’t Care — contents of all registers, including the read-only status 6 X Don’t Care

ページ18に含まれる内容の要旨

Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Single-Ended Headphone Amplifier Applications Information The MAX9777/MAX9778 can be configured as single- BTL Speaker Amplifiers ended headphone amplifiers through software or by The MAX9777/MAX9778 feature speaker amplifiers sensing the presence of a headphone plug (HPS). In designed to drive a load differentially, a configuration headphone mode, the inverting output of the BTL referred to as bridge-tied load (BTL). The BTL co

ページ19に含まれる内容の要旨

MAX9777/MAX9778 Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux Component Selection the load impedance form a highpass filter with a -3dB point determined by: Gain-Setting Resistors 1 External feedback components set the gain of the f = −3dB MAX9777/MAX9778. Resistor R sets the gain of the IN 2πRC L OUT input amplifier (A ), and resistor R sets the gain of VIN F the second stage amplifier (A ): VOUT As with the input capacitor, choose C such that OUT f is well below the low

ページ20に含まれる内容の要旨

Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Mux BIAS Capacitor where the impedance, C begins to decrease, and at F, BIAS is the output of the internally generated 2.5VDC high frequencies, the C is a short circuit. Here the F bias voltage. The BIAS bypass capacitor, C , impedance of the feedback loop is: BIAS improves PSRR and THD+N by reducing power supply and other noise sources at the common-mode bias RR × FF 12 R = F() EFF node, and also generates the clickless/popless, s


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