ページ1に含まれる内容の要旨
Getting Started With
®
SHARC Processors
Revision 3.0, April 2010
Part Number
82-003536-01
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
a
ページ2に含まれる内容の要旨
Copyright Information ©2010 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent from Analog Devices, Inc. Printed in the USA. Disclaimer Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices, Inc. is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices, Inc. for its use; nor for any infringement of paten
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CONTENTS PREFACE Purpose of This Manual .................................................................. ix Intended Audience .......................................................................... ix Manual Contents ............................................................................. x What’s New in This Manual ............................................................. x Technical or Customer Support ........................................................ x Supported SHARC Pro
ページ4に含まれる内容の要旨
Contents Processor Peripherals and Performance .......................................... 1-8 Performance ............................................................................ 1-8 THE EVALUATION PROCESS Evaluation Tools ........................................................................... 2-1 Selecting Software Development Tools ..................................... 2-2 VisualDSP++ From Analog Devices ..................................... 2-2 Platform and Processor Support .........
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Contents EZ-Boards ........................................................................ 2-36 ADSP-21489 EZ-Board From Analog Devices ............... 2-37 ADSP-21479 EZ-Board From Analog Devices ............... 2-40 ADSP-21469 EZ-Board From Analog Devices ............... 2-43 Debug Agent ................................................................. 2-46 EZ-Extender Daughter Boards ....................................... 2-47 SHARC USB EZ-Extender ..........................................
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Contents Platform-Related Information ............................................. 3-3 Visual Learning and Development (VLD) ........................... 3-4 Workshops and Seminars ......................................................... 3-4 SHARC Processor Workshops ............................................. 3-4 SHARC Processor Seminars ................................................ 3-5 Processor Documentation ........................................................ 3-5 SHARC Processor Ma
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Contents VisualDSP++ Loader and Utilities Manual ..................... 3-11 VisualDSP++ Example Programs ................................... 3-12 Hardware Tools Documentation ........................................ 3-13 SHARC EZ-KIT Lite Evaluation System Manual ........... 3-13 SHARC EZ-Board Evaluation System Manual ............... 3-14 SHARC EZ-Extender Manual ....................................... 3-14 VisualDSP++ Help ............................................................ 3-14 Find
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Contents viii Getting Started With SHARC Processors
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PREFACE Thank you for your interest in the SHARC® family of processors from Analog Devices, Inc. Purpose of This Manual Getting Started With SHARC Processors provides you with information about the evaluation process, Analog Devices tools, training, documenta- tion, and other informational resources to assist you in the evaluation of SHARC processors. This manual describes the resources available to help you evaluate and design the SHARC processors into your final system. For engineers alrea
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Manual Contents Manual Contents This manual consists of: � Chapter 1, “Introduction to SHARC Processors” This chapter briefly describes the processor architecture, available models, and processor features. � Chapter 2, “The Evaluation Process” This chapter focuses on available software and hardware tools. � Chapter 3, “Support Options” This chapter describes support (documentation, training, and more) available during the evaluation and development processes. What’s New in This Manual This i
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Preface � E-mail processor questions to: processor.support@analog.com (World wide support) processor.europe@analog.com (Europe support) processor.china@analog.com (China support) � Phone questions to 1-800-ANALOGD � Contact your Analog Devices, Inc. local sales office or authorized distributor Supported SHARC Processors The name “SHARC” refers to a family of high performance, 32-bit, floating-point processors that can be used in speech, sound, graphics, and imaging applications. VisualDSP++
ページ12に含まれる内容の要旨
Product Information Product Information Product information can be obtained from the Analog Devices Web site, VisualDSP++ online Help system, and a technical library CD. Analog Devices Web Site The Analog Devices Web site, www.analog.com, provides information about a broad range of products—analog integrated circuits, amplifiers, converters, and digital signal processors. To access a complete technical library for each processor family, go to http://www.analog.com/processors/technical_librar
ページ13に含まれる内容の要旨
Preface VisualDSP++ Online Documentation Online documentation comprises the VisualDSP++ Help system, software tools manuals, hardware tools manuals, processor manuals, Dinkum Abridged C++ library, and FLEXnet License Tools software documenta- tion. You can search easily across the entire VisualDSP++ documentation set for any topic of interest. For easy printing, supplementary Portable Documentation Format (.pdf) files for all manuals are provided on the VisualDSP++ installation CD. Each d
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Product Information Data sheets, which can be downloaded from the Analog Devices Web site, change rapidly, and therefore are not included on the technical library CD. Technical manuals change periodically. Check the Web site for the latest manual revisions and associated documentation errata. xiv Getting Started With SHARC Processors
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1 INTRODUCTION TO SHARC PROCESSORS This chapter briefly describes the SHARC processor’s architecture and key features and compares available models. Topics include: � “What are SHARC Processors?” on page 1-1 � “Four Generations of SHARC Processors” on page 1-5 What are SHARC Processors? SHARC is the name of a family of high performance 32-bit floating-point processors based on a Super Harvard Architecture. SHARC processors dominate the floating-point digital signal processing market, deliver
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What are SHARC Processors? enables the SHARC user to leverage legacy code and design experience, while transitioning to higher-performance, more highly-integrated SHARC products. By integrating on-chip, single-instruction, multiple-data (SIMD) process- ing elements, SDRAM, and I/O peripherals, SHARC processors deliver breakthrough signal processing performance. SHARC Applications The combination of a high performance core surrounded by appropriate peripherals, a large software library, and a
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Introduction to SHARC Processors � Automotive audio applications. The ADSP-21362, ADSP-21365, ADSP-21369, ADSP-21371, ADSP-21462, ADSP-21465, ADSP-21469, ADSP-21472, ADSP-21475, and ADSP-21479 processors, with integration of sample-rate conversion, DTCP cipher, precision clock generators, and serial ports, are ideal choices for new multichannel automotive audio designs. � Broad market use. SHARC processors are available in commercial, industrial, and automotive temperature grade packages.
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What are SHARC Processors? Common Architectural Features SHARC processors share the following architectural features. � 32/40-bit IEEE floating-point math � 32-bit fixed-point multipliers with 64-bit product and 80-bit accu- mulation � No arithmetic pipeline. All computations are single cycle. � Circular buffer addressing supported in hardware � Sixteen address pointers supporting 16 circular buffers � Six nested levels of zero-overhead looping in hardware � Rich algebraic assembly language
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Introduction to SHARC Processors � An SDRAM controller that provides an interface to as many as four separate banks of industry-standard SDRAM devices � Up to a maximum of 5M bits of on-chip SRAM and up to 4M bits of on-chip, mask-programmable ROM � Input/output processor (IOP) with integrated direct memory access (DMA) controller, serial peripheral interface (SPI) compati- ble port, and serial ports (SPORTs) for point-to-point multiprocessor communications � A variety of audio-centric perip
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What are SHARC Processors? Internal Memory SIMD Core Block 0 Block 1 Block 2 Block 3 RAM/ROM RAM/ROM RAM RAM Instruction 5Stage Cache Sequencer B0D B1D B2D B3D 64-BIT 64-BIT 64-BIT 64-BIT Core DAG1/2 S Timer DMD DMD 64-BIT 64-BIT PEx PEy Core Bus Internal Memory I/F Cross Bar PMD PMD 64-BIT 64-BIT FLAGx/IRQx/ IOD0 32-BIT THERMAL EPD BUS 64-BIT JTAG TMREXP DIODE PERIPHERAL BUS 32-BIT IOD1 32-BIT IOD0 BUS FFT DTCP/ FIR MTM IIR PERIPHERAL BUS EP SPEP BUS CORE PDAP/ PCG TIMER SHIFT S/PDIF PCG ASRC
