ページ1に含まれる内容の要旨
User’s Guide
April 2001 Mixed-Signal Products
SLOU061A
ページ2に含まれる内容の要旨
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infri
ページ3に含まれる内容の要旨
Preface Related Documentation From Texas Instruments Amplifiers and Comparators Data Book (literature number SLOD002). This data book contains data sheets and other information on the TI operational amplifiers that can be used with this evaluation module. Power Supply Circuits Data Book (literature number SLVD002). This data book contains data sheets and other information on the TI shunt regulators that can be used with this evaluation module. FCC Warning This equipment is intended for use
ページ4に含まれる内容の要旨
iv
ページ5に含まれる内容の要旨
Running Title—Attribute Reference Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.1 Design Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 2 Evaluation Mod
ページ6に含まれる内容の要旨
Running Title—Attribute Reference Figures 2–1 Area 100 Schematic—Single Device, SOIC (8-pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 2–2 Area 200 Schematic—Dual Device, SOIC (14-pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4 2–3 Area 300 Schematic—Quad Device, SOIC (16-pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 2–4 Maximum Power Dissipation vs Free-Air Temperature . . . . . . . . . . . . . . . . . . . . . . . .
ページ7に含まれる内容の要旨
Chapter 1 Introduction This user’s guide describes the universal operational amplifier single, dual, quad (SOIC) evaluation module (EVM) with shutdown (SLOP248). The EVM simplifies evaluation of Texas Instruments surface-mount op amps with or without shutdown feature. Topic Page 1.1 Design Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2 1.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ページ8に含まれる内容の要旨
Design Features 1.1 Design Features The EVM board design allows many circuits to be constructed easily and quickly. There are three circuit development areas on the board, and each uses IC amplifiers in the SOIC package. Area 100 is for a single operational amplifier (op amp), with or without shutdown. It also features offset nulling pin pads. Area 200 is for a dual op amp, with or without shutdown. Area 300 is for a quad op amp, with or without shutdown. A few possible circuits include: Volta
ページ9に含まれる内容の要旨
Chapter 2 Evaluation Module Layout This chapter shows the universal operational amplifier single, dual, quad (SOIC) evaluation module (EVM) with shutdown board layout, schematics of each area, and describes the relationships between the three areas. Topic Page 2.1 Physical Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–2 2.2 Area 100—Single Device SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3 2.3 Area 200—Dual Device
ページ10に含まれる内容の要旨
Physical Considerations 2.1 Physical Considerations The EVM board has three circuit development areas. Each area can be separated from the others by breaking along the score lines. The circuit layout in each area supports an op amp package, voltage reference, and ancillary devices. The op amp package is unique to each area as described in the following paragraphs. The voltage reference and supporting devices are the same for all areas. Surface-mount or through-hole components can be used for all
ページ11に含まれる内容の要旨
Physical Considerations 2.2 Area 100—Single Device SOIC Area 100 uses 1xx reference designators, and is compatible with a single op amp, with or without shutdown, packaged as an 8-pin SOIC. This surface-mount package is designated by a D suffix in TI part numbers, as in TxxxxCD, TxxxxID, etc. Offset nulling can be extremely important in some applications. The EVM accommodates TI IC op amps that provide this feature. The input offset can be adjusted by connecting a 100-kΩ potentiometer between te
ページ12に含まれる内容の要旨
Physical Considerations 2.3 Area 200—Dual Device SOIC Area 200 uses 2xx reference designators, and is compatible with dual op amps, with or without shutdown, packaged as an 8-pin (without shutdown) or 14-pin (with shutdown) SOIC. This package is designated by a D suffix in TI part numbers, as in TxxxxCD. When using the nonshutdown version of the device, ensure that the IC is aligned at the top of the IC pad array—the last six PCB pads (three on each side—pins 5, 6, 7, 8, 9, and 10) will not be u
ページ13に含まれる内容の要旨
Physical Considerations 2.4 Area 300—Quad Device SOIC Area 300 uses 3xx reference designators, and is compatible with quad op amps, with or without shutdown, packaged in a 14-pin (without shutdown) or 16-pin (with shutdown) SOIC. This surface-mount package is designated by a D suffix in TI part numbers, as in TxxxxID. When using the nonshutdown version of the device, ensure that the IC is aligned at the top of the IC pad array—the last two PCB pads (one on each side—pins 8 and 9) will not be use
ページ14に含まれる内容の要旨
Physical Considerations Figure 2–3. Area 300 Schematic—Quad Device SOIC (16 pin) C302 V3+ R304 V3+ R302 C313 C314 C301 R301 A301– GND3 V3+ 4 R303 C311 C312 2 AB3/SD 8 A302– – 1 V3– A3 OUT R306 R305 3 + A303+ U301A V3– Power Supply Bypass 13 A304+ V3– R308 R309 C310 R314 A3 FLT C304 R307 C305 R318 C308 R310 B301– C303 R312 6 – B302– 7 B3 OUT R313 R317 5 + B303+ U301B B304+ R315 R316 B3 FLT C307 R311 C306 C317 R323 R325 C309 C316 R322 C301– R324 11 9 CD3/SD – C302– 10 C3 OUT R327 R326 12 + C303+ C
ページ15に含まれる内容の要旨
General Power Dissipation Considerations 2.5 General Power Dissipation Considerations For a given θ , the maximum power dissipation is shown in Figure 2–4 and is calculated by the JA following formula: T –T MAX A P D JA Where: P = Maximum power dissipation of Txxxx IC (watts) D T = Absolute maximum junction temperature (150°C) MAX T = Free-air temperature (°C) A θ = θ + θ JA JC CA θ = Thermal coefficient from junction to case JC θ = Thermal coefficient from case to ambient air (°C/W) CA
ページ16に含まれる内容の要旨
EVM Component Placement 2.6 EVM Component Placement Figure 2–5 shows component placement for the EVM board. Figure 2–5. EVM Component Placement 2-8 Evaluation Module Layout
ページ17に含まれる内容の要旨
EVM Board Layout 2.7 EVM Board Layout Figures 2–6 and 2–7 show the EVM top and bottom board layouts, respectively. Figure 2–6. EVM Board Layout—Top Evaluation Module Layout 2-9
ページ18に含まれる内容の要旨
EVM Board Layout Figure 2–7. EVM Board Layout—Bottom 2-10 Evaluation Module Layout
ページ19に含まれる内容の要旨
Chapter 3 Example Circuits This chapter shows and discusses several example circuits that can be constructed using the universal operational amplifier EVM. The circuits are all classic designs that can be found in most operational amplifier design books. Topic Page 3.1 Schematic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2 3.2 Inverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2 3.3 Noni
ページ20に含まれる内容の要旨
Schematic Conventions 3.1 Schematic Conventions Figures 3–1 through 3–6 show schematic examples of circuits that can be constructed using the universal operational amplifier EVM with shutdown. The components that are placed on the board are shown in bold. Unused components are blanked out. Jumpers and other changes are noted. These examples are only a few of the many circuits that can be built. 3.2 Inverting Amplifier Figure 3–1 shows area 100 equipped with a single operational amplifier configu
