ページ1に含まれる内容の要旨
TEA5880TS
Integrated FM stereo radio IC for host processor tuning in
handheld applications
Rev. 02 — 26 April 2004 Preliminary data sheet
1. General description
The TEA5880TS stereo FM radio IC dramatically reduces the printed-circuit board area
2
(only 100 mm ) needed to integrate FM radio functionality into portable devices. This
makes it invaluable for any application where space is at a premium.
Relying on a system host processor for radio tuning, the TEA5880TS is ideally suited for
powerful
ページ2に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning 3. Quick reference data Table 1: Quick reference data V = V CCA CCD Symbol Parameter Conditions Min Typ Max Unit V analog supply voltage 2.7 3.0 5.0 V CCA V digital supply voltage 2.7 3.0 5.0 V CCD I analog supply current operating - 17 22 mA CCA standby - 1 100 μA I digital supply current operating - 250 500 mA CCD standby - 1 100 μA I optional stereo LED - 1 2 mA LED f FM input frequency 76 - 108 MHz FM(an
ページ3に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning Table 1: Quick reference data …continued V = V CCA CCD Symbol Parameter Conditions Min Typ Max Unit THD total harmonic distortion V = 1 mV; left = right; Δf = 75 kHz; - 0.7 1.5 % RF f = 1 kHz; B = 300 Hz to 15 kHz mod AF V = 1 mV; left = right; Δf = 22.5 kHz; - 0.2 0.7 % RF f = 1 kHz; B = 300 Hz to 15 kHz mod AF integrated de-emphasis - 50/75 - μs DEEM 4. Ordering information Table 2: Ordering information Ty
ページ4に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning 5. Block diagram 9397 750 13022 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Preliminary data sheet Rev. 02 — 26 April 2004 4 of 27 xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxx
ページ5に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning 9397 750 13022 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Preliminary data sheet Rev. 02 — 26 April 2004 5 of 27 xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xx
ページ6に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning 6. Pinning information 6.1 Pin description Table 3: Pin description Symbol Pin Description RFIN 1 RF input RFGND 2 RF ground GND 3 ground V 4 digital supply voltage CCD V 5 analog supply voltage CCA R/W 6 digital read/write command input DATA 7 bidirectional digital data line CLOCK 8 digital data clock line input MPX 9 FM MPX signal output AUDL 10 audio left channel output AUDR 11 audio right channel output
ページ7に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning RFIN 1 24 GND RFGND 2 23 n.c. GND 3 22 n.c. V 4 21 reserved CCD V 5 20 LL1 CCA R/W 6 19 V CC1 TEA5880TS DATA 7 18 V CC1 CLOCK 8 17 LR1 MPX 9 16 n.c. AUDL 10 15 n.c. AUDR 11 14 n.c. LED 12 13 GND 001aaa667 Fig 3. Pin configuration. 7. Functional description 7.1 FM quadrature mixer The FM quadrature mixer converts FM RF (76 MHz to 108 MHz) to an IF of 110 kHz. The FM quadrature mixer provides inherent image rej
ページ8に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning 7.8 Stereo decoder The PLL stereo decoder is adjustment free. The stereo decoder can be switched to mono via the digital interface. 8. Digital interface (3-wire bus) The TEA5880TS has a 3-wire bus with read/write, clock and data line. The register set of the TEA5880TS can be accessed via the digital interface. The pins given in Table 4 are defined for the digital interface of the TEA5880TS. Table 4: Digital i
ページ9に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning 8.1 Register description Table 5: TEA5880TS registers description Address Register name Access Operation Data width Clocks 0000b VADC write only VADC register 11 bits 15 0001b CTRL_C write only control register C 11 bits 15 0010b CTRL_A write only control register A 11 bits 15 0011b OSC_STEREO write only oscillator stereo 11 bits 15 decoder clock 0100b CTRL_B write only control register B 11 bits 15 0101b CA
ページ10に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning Table 9: CTRL_A - (address 2h) bit description Bit Symbol Description 14 to 11 - address bits 10 to 7 OUTPUT_ selects an internal circuit as output for measurement purpose; SELECT[3:0] see Table 10 6 STE_PMUTE mutes the stereo PLL when set to logic 1; this bit should be set during calibration of the stereo decoder clock and should be cleared during normal operation 5 DEM_PMUTE mutes the demodulator PLL when
ページ11に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning Table 12: CTRL_B - (address 4h) bit description Bit Symbol Description 14 to 11 - address bits 10 L_CNT latch counter: a transition from logic 1 to logic 0 will latch the COUNTER register into the PISO (reading the PISO hereafter will read the COUNTER register) 9 L_STS latch status: a transition from logic 1 to logic 0 will latch the STATUS register into the PISO (reading the PISO hereafter will read the STA
ページ12に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning [1] Table 15: OSC_IF - (address 6h) bit description Bit Symbol Description 14 to 11 - address bits 10 to 0 IFO[10:0] 11-bit digital-to-analog converter for adjusting the IF frequency [1] The frequency is decreased when increasing the content of this register. [1] Table 16: OSC_FM - (address 7h) bit description Bit Symbol Description 14 to 11 - address bits 10 to 0 FO[10:0] 11-bit digital-to-analog converter
ページ13に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning 8.2 Accessing the TEA5880TS Access to the TEA5880TS can be achieved via the 3-wire bus. At the host side, the R/W and CLOCK are output signals, while the DATA signal is bidirectional. When powered up, the host should initialize the 3-wire bus in the host read mode as follows: 1. Set (at host side) the DATA line into input mode 2. R/W set to LOW 3. CLOCK set to LOW. Note: Use the following sequence for changi
ページ14に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning 8.4 Reading from the TEA5880TS Only the status or the counter register can be read from the TEA5880TS. These are 16-bit registers and can be read serially as follow: 1. Select OS_PISO (parallel in, serial out) as output (control register A, OUTPUT_SELECT bits) 2. Clear the PISO (control register B, PISO_CLR bit, pulse HIGH-to-LOW transition) 3. Latch the counter register (control register B, L_CNT bit, pulse
ページ15に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning The IF and stereo decoder frequency can be calculated using the equation f = n/t, and the FM frequency can be calculated using the equation f = (n/t) x 256. Note: The precision of ‘f’ depends on the following: • The duration of t. 1 pulse wrong at t = 1 ms results in more deviation than at t = 32 ms • The precision of the measuring window: calculate with t = 32 ms gives other ‘f’ values than with t = 32 ms.
ページ16に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning R/W CLOCK 0 15 DATA LSB MSB 16-bit data 001aaa670 Fig 6. Reading data. enable FM OSC at output source selector enable internet clock set 16-bit counter clear reset 16-bit counter clear enable 16-bit counter to count timing width 8 ms to 100 ms disable 16-bit counter enable PISO at output source 001aaa671 Fig 7. Measuring sequence. 9397 750 13022 © Koninklijke Philips Electronics N.V. 2004. All rights reserve
ページ17に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning 10. Limiting values Table 19: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V digital supply voltage - 0.3 +5 V CCD V analog supply voltage - 0.3 +8 V CCA T storage temperature - 55 +150 °C stg T ambient temperature V = V = V = 3 V - 10 +75 °C amb CCA CC(VCO) CCD V = V = V = 5 V - 40 +85 °C CCA CC(VCO) CCD [1] V electrostatic disch
ページ18に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning 001aaa673 20 dB (1) 0 (2) - 20 (3) - 40 (4) (5) - 60 - 10 30 70 110 RFIN (dBμV) (1) Mono signal. (2) Mono noise. (3) Stereo left. (4) Stereo right. (5) Stereo noise. Fig 8. Signal characteristics. 001aaa674 5 THD (%) 4 3 2 1 0 - 10 30 70 110 RFIN (dBμV) THD = 30 %. Fig 9. Total harmonic distortion. 13. Components list No external components necessary. 9397 750 13022 © Koninklijke Philips Electronics N.V. 200
ページ19に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning 14. Printed-circuit board layout for SSOP24 package The printed-circuit board traces from LL1 to V and from V to LR1 as shown in CC1 CC1 Figure 10, are to create two inductors, each of approximately 38 nH. These inductors, together with internal capacitors, form part of the LC oscillator to determine the FM tuning band. If the value of the inductors becomes much greater than 38 nH, the whole FM tuning band (
ページ20に含まれる内容の要旨
TEA5880TS Philips Semiconductors Integrated FM stereo radio IC for host processor tuning 15. Application information FM antenna RFIN 1 24 2 23 3 22 V CCD 4 21 (1) 100 nF V CCA 5 20 LL1 R/W 6 19 V CC1 TEA5880FM (1) 100 nF V DATA 7 18 CC1 LR1 CLOCK 8 17 9 16 MPX AUDL 10 15 11 14 AUDR LED 12 13 001aaa672 (1) optional. Fig 11. Application diagram. 9397 750 13022 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Preliminary data sheet Rev. 02 — 26 April 2004 20 of 27
