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Evaluation Board Manual
S3F401F
16/32-BIT RISC
MICROPROCESSOR
Dec, 2007
REV 1.00
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Table of Contents Chapter 1 Evaluation Board Manual 1. Overview ...................................................................................................................................................... 1 1.1 Features................................................................................................................................................ 3 1.2 System Requirements ................................................................................................
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 1 EVALUATION BOARD MANUAL 1. OVERVIEW S3F401F EVB (Evaluation Board) is a compact platform that is suitable for code development of SAMSUNG's S3F401F 16-/32-bit RISC microcontroller for an inverter motor and general purpose application. EVB is consists of several blocks, which can make operate the function of S3F401F. Those functions are from the followings: • A 16-/32-bit RI
ページ4に含まれる内容の要旨
EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 AHB FLASH-ROM ARM7TDMI-S 256KB CORE SRAM INTERRUPT 20KB CONTROLLER TAP CONTROLLER Crystal or For JTAG Ceramic PLL Oscillator BRIDGE APB CLOCK MONITOR IMC0/1 ENC0/1 UART0/1 IMC0/1 ENC0/1 UART0/1 I/O CONTROLLER SSP0/1 SSP0/1 BT & WDT Timer0/1/2/3/4/5 Timer0/1/2/3/4/5 Timer0/1/2/3/4/5 Timer0/1/2/3/4/5 12-BIT ADC TIMER 0/1/2/3/4/5 Figure 1. S3F401F Block Diagram 2
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 1.1 FEATURES Micro-Controller S3F401F, ARM7TDMIS, 16/32-bit RISC Microcontroller Board Power Source External DC 7~12V Adjustable voltage regulator out is 3.2V Board Master Power Switch SW6 UART Support to protocol for RS-232 Physical interface circuit connected to standard PC through DB9(female) Interface driver IC MAX3221 Synchronous Serial Port Provide SSP, SPI serial c
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 1.3 BOARD COMPONENTS The board consists of the followings. S3F401F Micro-controller 64LC40S and X25650 as a serial EEPROM for SSP 2 x DSUB Connector for RS-232 2 x Header groups for IMC function 1 x Buzzer 6 x Switches: IRQ x 2, Power, Reset 4 x LED: Power x1, IO Port output x 3 A regulator to generate 3.3V 4MHz Crystal as a master system clock source Switches for AD
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 2. CONFIGURATION IMC1 HEADER CONNECTOR Page 1-11 SSP BLOCK JTAG Page 1-9 12-bit ADC BLOCK MODE SETTING BLOCK Page 1 -12 Page 1-7 Buzzer S3F401FX Main OSC POWER BLOCK 7-SEGMENT UART BLOCK IMC0 HEADER CONNECTOR Page 1-6 Page 1-10 Page 1-8 Page 1-11 Figure 2. S3F401F Evaluation Board Top-view 5
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 2.1 DETAILED BLOCK CONFIGURATIONS 2.1.1 Power Block 5 4 2 3 1 CN1, CN2, J23: Power Supply Connector CN1 : VIN CN2 : GND J23 : DC adapter connector U7: Adjustable Voltage Regulator 3.3V generator VDD33, VDDCORE, VDDIO SW6: Power Switch DS4: Power Display LED VDD33 Power-on status display J22: Jumper Setting
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 2.1.2 Mode Setting Block J9 & J10 & J11: Jumper Setting J9 J10 J11 MD[2:0] 2-3 Connection 2-3 Connection 2-3 Connection NORMAL 1-2 Connection 2-3 Connection 2-3 Connection SPGM Others Only TEST Mode 7
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 2.1.3 UART Block 2 1 3 U10, U11: UART Driver IC P2, P3: UART Connector Jumper Setting J25 TXD0 UARTTXD0 is connected to T1IN of MAX3221. RXD0 UARTRXD0 is connected to R1OUT of MAX3221. Jumper Setting J26 TXD1 UARTTXD1 is connected to T1IN of MAX3221 RXD1 UARTRXD1 is connected to R1OUT of MAX3221. 8
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 9
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 2.1.4 SSP Block 2 1 U9: SSP8 serial EEPROM (8K × 8bit) SW9 ON FSS0 is connected to P1.16. RXD0 is connected to P1.14. SW10 ON CLK0 is connected to P1.15. TXD0 is connected to P1.13. U8: SSP16 serial EEPROM (4K × 16bit) SW7 ON FSS1 is connected to P1.20. CLK1 is connected to P1.19. RXD1 is connected to P1.18. TXD1 is connected to P1.17. SW8 ON The RDY/nBUSY pi
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 11
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 2.1.5 7-SEGMENT BLOCK 1 2 3 The assignment of 7-segment control pins on the S3F401F-EVB is the same like this. SW1 ON: This Port (P0.0~P0.7) is connected to each segment of 7-segment. SW2 ON: This Port (P1.9~P1.12) is connected to latch. U3: 7-segment display 12
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 2.1.6 IMC BLOCK 1 2 The assignment of IMC pins on the S3F401F-EVB is the same like this. J20: A header pin group for MOTOR1 J21: A header pin group for MOTOR2 13
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 2.1.7 ADC BLOCK 23 4 5 1 J1: ADC input connector J2, J3, J4: J2, J3 and J4 are selected to sample test with AIN0, AIN1 and AIN2 RV1: Variable Resistor J24: ADC Power Source Close: When connecting (short), AVDD is same to VDD33. Open: AVDD is a second (right) pin of J24. So, AVDD should be connected to another power. J7: 2,3 connection - ADTRG signal is gen
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 3. TOTAL BLOCKS’ UNIT & JUMPER SUMMURY 3.1 FUNCTION BLOCKS Block Symbols Description 7-SEGMENT U3 4Digit Segment IMC J20 MOTOR 1 J21 MOTOR 2 UART U14 RS-232 transceiver P41 RS-232 connector SSP U7 SPI8 interface EEPROM (8K × 8bit) U8 SPI16 interface EEPROM (4K × 16bit) J28 SPI block pin assignment POWER U11 3.3V generator regulator LED DS1 Red LED DS2 Green LED D
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 3.2 JUMPER CONNECTION JP# Description Default Setting J1 ADC block pin assignment AIN0~AIN14 − J2 AIN0 input voltage connector Connect (Short) J3 AIN1 input voltage connector Connect (Short) J4 AIN2 input voltage connector Connect (Short) J5 SW3_INPUT Open VDDIO connects to INT7 J6 Buzzer connector Connect (Short) T3PWM connects to Buzzer J7 SW4_INPUT Connect ADTRG
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 3.2 JUMPER CONNECTION (Continued) JP# Description Default Setting J9 MODE selection J9 J10 J11 MD[1:0] All 2-3 connect :Normal Mode J10 2-3 2-3 2-3 NORMAL J11 1-2 2-3 2-3 SPGM J12 Port assignment pin Port 2 Open J13 Port assignment pin Port 1 Open J14 Port assignment pin Port 0 Open J15 nTRST The JTAG connects to nTRST Open J16 Chip socket connection Chip socket board
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EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 3.3 SWITCHES SW# Description SW1 7-Segment ON: Port 0.0~0.7 connects to 7segment SW2 Latch ON: Port 1.9~1.12 connects to latch SW3 INT7 LOW signal is generated by SW3 SW4 INT8 HIGH signal is generated by SW4 SW5 RESET Reset signal is generated by SW6 SW6 Power_VIN Power on switch SW7 SSP16 Port connects to EEPROM SW8 SSP16 Port connects to EEPROM SW9 SSP8 Port connects
