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ReadyBoard 700
Single Board Computer
Reference Manual
P/N 5001722A Revision C
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Notice Page NOTICE No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual, or otherwise, without the prior written permission of Ampro Computers, Incorporated. DISCLAIMER Ampro Computers, Incorporated makes no representations or warranties with respect to the contents of this manual or of the associated Ampro p
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Contents Chapter 1 About This Manual.........................................................................................................1 Purpose of this Manual.......................................................................................................................1 Reference Material .............................................................................................................................1 Related Ampro Products .............................................
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Contents LCD Interface (J9)........................................................................................................................ 47 LVDS Interface (J7) ..................................................................................................................... 48 Miscellaneous................................................................................................................................... 49 Utility Interface (J18).....................................
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Contents Figure B-1. PXE Agent Boot Setup Screen.....................................................................................77 List of Tables Table 2-1. Major Integrated Circuit Description and Function.........................................................10 Table 2-2. Connector Descriptions..................................................................................................11 Table 2-3. Reset Switch (SW1) .............................................................
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Contents vi Reference Manual ReadyBoard 700
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Chapter 1 About This Manual Purpose of this Manual This manual is for designers of systems based on the ReadyBoard™ 700 single board computer (SBC). This manual contains information that permits designers to create an embedded system based on specific design requirements. Information provided in this reference manual includes: • ReadyBoard 700 Specifications • Environmental requirements • Major integrated circuits (chips) and features implemented • ReadyBoard 700 connector/pin numbers and defini
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Chapter 1 About This Manual Chip specifications used on the ReadyBoard 700: • Intel Corporation and the Celeron or Pentium III processor used for the embedded CPU. Web site: http://www.intel.com/design/intarch/datashts/273299.htm = Pentium III Web site: http://www.intel.com/design/intarch/datashts/273509.htm = Celeron • VIA Technologies, Inc. and the Twister-T chipset, VT8606 and VT82C686B, used for the Northbridge/Video controller and Southbridge respectively. Web site: http://www.viatech.com •
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Chapter 1 About This Manual • LittleBoard Family – These high-performance, highly integrated single-board computers use the EBX form factor (5.75x8.00 inches), and are available with Pentium III and Celeron processors. The EBX-compliant Little Board single-board computers offer functions equivalent to a complete laptop or desktop PC system, plus several expansion cards. Built-in extras to meet the critical requirements of embedded applications include onboard solid state disk capability, watc
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Chapter 1 About This Manual 4 Reference Manual ReadyBoard 700
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Chapter 2 Product Overview This introduction presents general information about the EPIC Architecture and the ReadyBoard 700 single board computer (SBC). After reading this chapter you should understand: • EPIC Architecture • ReadyBoard 700 architecture • ReadyBoard 700 features • Major components • Connectors • Specifications EPIC Architecture In 2004, five companies collaborated to publish a standard that fills the void between the EBX and the PC/104 size boards with a new industry standard f
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Chapter 2 Product Overview Product Description The ReadyBoard 700 is a mid-sized, EPIC-compatible, low cost, high quality single-board system, which contains all the component subsystems of a PC/AT PCI motherboard plus the equivalent of up to 5 PCI expansion boards. The ReadyBoard 700 is based on either the ultra high performance, high- integration 933MHz Low Voltage Pentium® III processor, or the Low- Voltage 650MHz Celeron processor, or the low cost, Ultra Low-Voltage 400MHz Celeron processor
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Chapter 2 Product Overview ♦ Supports dual bus master mode ♦ Supports Ultra DMA 33/66/100 modes ♦ Supports ATAPI and DVD peripherals ♦ Supports IDE native and ATA compatibility modes ♦ CompactFlash Adapter (Secondary IDE only) • Supports Type I or Type II PC Card socket • Supports IDE CompactFlash Card • Supports secondary IDE bus with Master/Slave jumper • Supports bootable CompactFlash card • Floppy/Parallel Interface ♦ Shared floppy/parallel connector ♦ Supports one standard (34-pin) floppy d
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Chapter 2 Product Overview ♦ Supports PS/2 mouse ♦ Provides a shared over-current fuse • Audio interface ♦ Supports AC’97 standard ♦ AC’97 CODEC on board ♦ Supports Stereo Line In/Out ♦ Supports MIC in (Mono) • Ethernet Interface ♦ Supports two fully independent Ethernet (RJ45) ports ♦ Integrated LEDs on each port (Link/Activity and Speed) ♦ Two Intel 82551ER Controller chips ♦ Supports IEEE 802.3 10BaseT/100BaseTX compatible physical layer ♦ Supports auto-negotiation for speed, duplex mode, a
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PC/104 Connector Chapter 2 Product Overview Block Diagram Figure 2-2 shows the functional components of the board. Intel CPU Clock CRT VGA SDRAM Northbridge Temp TFT LCD SODIMM Memory Bus VT8606 LVDS LCD SMBus PCI Bus PC/104-Plus ATA IDE Primary Bus Connector IDE Secondary Southbridge CompactFlash Socket VT82C686B Ethernet Controller 82251ER IrDA 1.1 USB Port 1 Ethernet Floppy/ USB Port 2 USB Controller Parallel USB Port 3 82251ER Keyboard/ USB Port 4 Mouse ISA B
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J12 BT1 J17 Chapter 2 Product Overview Major Integrated Circuits (ICs) Table 2-1 lists the major integrated circuits, including a brief description of each, on the ReadyBoard 700 and Figure 2-3 shows the location of the major chips. Table 2-1. Major Integrated Circuit Description and Function Chip Type Mfg. Model Description Function CPU (U4) Intel Pentium III CPUs offered at 933MHz (Pentium III) Embedded or Celeron 650MHz or 400MHz (Celeron) CPU Northbridge VIA VT8606 Northbridge functions plu
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Chapter 2 Product Overview Connector Definitions Table 2-2 describes the connectors shown in Figures 2-3 to 2-5. All I/O connectors use 0.1” pin spacing unless otherwise indicated. Table 2-2. Connector Descriptions Jack # Signal/Device Description BTI RTC battery (B1) 2-pin, 1.25 header for battery input DIMM1 SODIMM 144-pin socket for SDRAM SODIMM J1 Fan connector 3-pin header provides +12v, tach, and ground to fan. J2 GPIO 10-pin, 2mm connector J3 Serial 3 & 4 20-pin, 2mm connector for seria
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J12 BT1 J17 Chapter 2 Product Overview Serial B (J3) (COM3 & 4) GPIO (J2) Fan (J1) J1 U12 U1 Q11 J2 J4 J3 43 1 U2 JP6 2 JP1 Power In Serial A (J4) (J5A/B) U32 (COM1 & 2) J5 U3 U4 Power-On Header (J6) LVDS (J7) J6 J26 D1 JP2 Y1 J7 CRT (J8) U5 (VGA) J8 U6 LCD (J9) U33 J13 J9 Ethernet 1 U7 (J10) U8 PC/104-Plus J10 (J12) J14 PC/104 (J13A/B Y2 J14A/B) J11 Ethernet 2 Lithium (J11) U9 Battery (B1) J15 USB 0 & 1 Y3 (J15A/B) U10 PS/2 U11 Keybo
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Chapter 2 Product Overview L1 Q10 Q9 U24 Q7 Q5 D9 SODIMM Socket (DIMM1) U22 CompactFlash Socket (J23) U21 USB 1 Fuse (F4) F4 F3 USB 0 U20 Fuse (F3) J23 F2 Keyboard/ Mouse Q4 Fuse (F2) D7 U19 U17 F1 USB 2 & 3 Q2 Fuse (F1) D6 D5 Figure 2-5. Connector and Component Locations (Bottom view) NOTE Pin-1 is shown as a black square in all connectors and jumpers in all illustrations. Additional Components The fuses in Table 2-4 are shown in Figure 2-5. Table 2-4. Additional Compone
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Chapter 2 Product Overview Jumper Definitions Table 2-5 describes the jumpers shown in Figure 2-6. Refer to the Oops! Jumper to clear the BIOS. Table 2-5. Jumper Settings Jumper # Installed Removed JP1 – TFT/LCD Clock Clock Invert (pins 1-2) Clock Normal (pins 2-3) Default JP2 – LCD Voltage Type Enable +3.3V (pins 1-2) Default Enable +5V (2-3) JP3 – CMOS Normal/Clear Normal (pins 1-2) Default Clears Time & Date only (pins 2-3) JP4 – CF Master/Slave Master (pins 1-2) Default Slave (removed) JP5
