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Intel® PXA27x Processor Family
Power Requirements
Application Note
Order Number: 280005-002
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Intel® PXA27x Processor Family Power Requirements Contents Contents 1.0 Introduction....................................................................................................................................5 1.1 Naming Conventions ............................................................................................................5 2.0 Intel® PXA27x Processor Power Supply Domains.....................................................................5 2.1 Power Domains and System V
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Intel® PXA27x Processor Family Power Requirements Contents 7.2 nBATT_FAULT ...................................................................................................................32 8.0 Power Management Integrated Circuit Requirements............................................................. 32 8.1 General PMIC Characteristics ............................................................................................32 8.2 Features of a PMIC.......................................
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Intel® PXA27x Processor Family Power Requirements 1.0 Introduction The Intel® PXA27x Processor Family (PXA27x processor) is a highly integrated system-on-chip optimized for handheld battery-powered devices such as PDAs and 2.5G or 3G cell phones. The PXA27x processor is ideal for products requiring substantial computing and multimedia capability with very low power consumption. The PXA27x processor combines a high-performance CPU with a variety of integrated peripheral functions. The process
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Intel® PXA27x Processor Family Power Requirements The terms run mode and normal mode are used interchangeably, although normal mode comprises both the run-mode and turbo-mode settings. 2.0 Intel® PXA27x Processor Power Supply Domains Viewed externally, the main or backup battery powers ten power-supply domains. Additional supply domains are present internally, but power for these is derived from the external supply inputs. All functional units within a power domain connect to the same powe
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Intel® PXA27x Processor Family Power Requirements Figure 1. Intel® PXA27x Processor Internal and External Power Domains VCC_PLL VCC_CORE VCC_SRAM VCC_PLL VCC_CPU C-PLL CPU Intr prg. frq. Control MEM Control P-PLL 312 M VCC_PER LCD VCC_OSC Control PXTAL SRAM 13 M Control TXTAL USB-H 32.768 k 48.000 M DMA/ Bridge USB-C DC-DC 48.000 M V-Reg Lin-Reg L1 VCC_R3 SRAM ICP 3 48.000 M VCC_RTC CPM VCC_R2 32.768 k 2 I S SRAM prg. frq. 2 RTC 32.768 k MMC VCC_R1 19.500 M SRAM VCC_PI 2 1 PWR_I C 13 M BB 48.000
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Intel® PXA27x Processor Family Power Requirements 2.1 Power Domains and System Voltage/Current Requirements The following sections document the power requirements for the PXA27x processor, but do not include external support, memory, or other peripheral components. The power consumption values shown in Table 5 are all worst-case numbers. These numbers give the worst-case system power-supply requirements and do not reflect typical system power consumption. 2.1.1 Intel® PXA27x Processor Powe
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Intel® PXA27x Processor Family Power Requirements Table 2. Intel® PXA27x Processor Voltage Domains (Sheet 1 of 2) Voltage Description VCC_BATT BATTERY VOLTAGE: Voltage-limited power from the main battery, or directly from a backup battery, at nominal 3.0 V (±25%). VCC_BATT must be supplied to start the power manager. When the main battery is installed, VCC_BATT powers the real-time clock and power management circuitry during initial power-on, sleep, deep sleep and sleep wake-up, so it remain
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Intel® PXA27x Processor Family Power Requirements Table 2. Intel® PXA27x Processor Voltage Domains (Sheet 2 of 2) Voltage Description VCC_IO Fixed 3.0 V or 3.3 V (±10%) for standard CMOS I/Os interfacing to external components, which are also supplied from fixed 3.0 V or 3.3 V. The I/Os for external components connected to the corresponding signals on the PXA27x processor must be supplied from the same regulator. Driving VCC_BATT in this manner prevents forward- biasing of protection diodes
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Intel® PXA27x Processor Family Power Requirements Table 3. Regulators Required to Power the Intel® PXA27x Processor Regulator Description Regulated main battery voltage, nominally 3.0 V (limited to a maximum of 3.75 V) to power 1 VCC_BATT and charge the optional backup battery also connected to VCC_BATT. VCC_IO, VCC_LCD, VCC_MEM, VCC_BB, VCC_USB connected together (can be powered at 2 3.0V or 3.3 V (±10%)). 3 VCC_USIM at 1.8V and 3.0 V (±10%) VCC_CORE and VCC_SRAM may be connected together, fi
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Intel® PXA27x Processor Family Power Requirements Note: The figures in Table 4 where taken from a system with no enhanced power management optimization such as Intel Wireless Speedstep (which allows control over the PXA27x processors low power modes and dynamically selectable frequency and voltage change capability). Table 4. Intel® PXA27x Processor VCC_CORE Supply Current Frequency Power Stress Dhrystones 2.1 Power MPEG4 Decode Power Power Point @ Test Current (mA) (mW) current (mA) (mW) (
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Intel® PXA27x Processor Family Power Requirements Table 5. Intel® PXA27x Processor Supply Current For Each Power Domain Current (mA) @ Power Name Functional Units voltage V (mW) VCC_BATT Power manager and real-time clock max. during power-on and 10 @ 3.75 V 37.5 sleep wakeup Power manager and real-time clock typical during deep sleep 6 µA @ 3.0 V 20 µW VCC_IO Peripheral input/output 25 @ 3.3 V 82.5 VCC_LCD LCD input/output 11 @ 3.3 V 33 VCC_MEM Memory controller input/output 300 @ 3.3 V 1080 (
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Intel® PXA27x Processor Family Power Requirements these supplies must come up at the required voltage to operate reliably and to avoid damage to the 1 external components. VCC_IO must be the highest potential of the system I/O supplies . VCC_IO can be connected to any of VCC_LCD, VCC_MEM, VCC_USIM, VCC_USB and VCC_BB, but none of these supplies can exceed VCC_IO. The power-up voltage requirement must be communicated by some input strapping mechanism on the PMIC if a PMIC can provide more t
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Intel® PXA27x Processor Family Power Requirements Table 6. Possible Backup Battery Configurations Backup Battery Description Connection VCC_BATT and PMIC The backup battery connects to both the VCC_BATT input and PMIC charging regulator (driven from the main battery or AC adaptor supply). Powering VCC_BATT from a battery directly eliminates the inefficiency of an external regulator in the PMIC, maximizing the battery life in sleep and deep sleep. In such a configuration, ensure that the req
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Intel® PXA27x Processor Family Power Requirements Figure 2. Typical Battery and External Regulator Configuration PXA27x Processor 16 Application Note
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Intel® PXA27x Processor Family Power Requirements 3.0 Intel® PXA27x Processor Low Power Operating Modes The PXA27x processor provides several low-power operating modes that temporarily suspend or power down the core or peripherals to reduce power consumption. The external power supplies are disabled in some modes. Transitions between certain domains require a sequence of events and handshakes between the PXA27x processor and the external power management integrated circuit (PMIC) that are d
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Intel® PXA27x Processor Family Power Requirements Figure 3. Overview of Power Management Operating Modes Reset Mode any reset asserted reset de-asserted Idle Normal Mode Sleep instruction instruction CPDIS=1 Idle instruction Wake-up event Standby CPDIS=0 OR (Fault & xIDAE=1) Interrupt instruction OR (Fault & xIDAE=1) Wake-up event OR (Fault & xIDAE=1) Interrupt OR (Fault & xIDAE=1) Wake-up event OR (Fault & xIDAE=1) Deep Idle Mode Idle Mode Standby Mode Sleep Mode Fault & xIDAE=0 Fault & xIDAE
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Intel® PXA27x Processor Family Power Requirements Table 8. Power Controller Interface Signals 1 Signal Definition Active State Signal Direction PWR_EN Power enable high Output SYS_EN System enable high Output 2 PWR_SCL I C bus clock Clock Output 2 PWR_SDA I C bus data — Bidirectional Forces an unconditional hardware nRESET low Input reset Indicates main battery removed or nBATT_FAULT low Input discharged Indicates one or more supplies are out nVDD_FAULT low Input of regulation NOTE: 1. Input
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Intel® PXA27x Processor Family Power Requirements 2 4.4 Power Manager I C Data (PWR_SDA) / GPIO<4>) 2 The PWR_SDA signal is the power manager I C data signal to the external PMIC. It functions like an open-drain signal so either component can pull it down to a logic-low level. 2 4.5 System-Level Considerations for I C 2 Both I C signals have an alternate function on the PXA27x processor as GPIO signals. Following cold-start power-on or a hard reset, both signals default to the GPIO mode of
