ページ1に含まれる内容の要旨
®
Intel Server Board
SE7520JR2
Technical Product Specification
Revision 1.0
October 2004
Enterprise Platforms and Services Marketing
ページ2に含まれる内容の要旨
Revision History Intel® Server Board SE7520JR2 Revision History Date Revision Modifications Number December 2003 0.5 Preliminary Release June 2004 0.9 Memory Sub-system rewrite, BIOS Chapter Updated, Management Chapter re-write, Error Handling chapter re-write, several changes made to better reflect final design October 2004 1.0 First non-NDA release; Updated IRQ routing diagrams, Updated mBMC Sensor tables, Updates to Regulatory Information, Updated Sensor data tables ii R
ページ3に含まれる内容の要旨
Intel® Server Board SE7520JR2 Disclaimers Disclaimers ® Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability
ページ4に含まれる内容の要旨
Table of Contents Intel® Server Board SE7520JR2 Table of Contents 1. Introduction ........................................................................................................................19 1.1 Chapter Outline......................................................................................................19 1.2 Server Board Use Disclaimer ................................................................................20 2. Server Board Overview...........................
ページ5に含まれる内容の要旨
Intel® Server Board SE7520JR2 Table of Contents 3.2.2 PCI-X Hub (PXH)...................................................................................................33 3.2.2.1 Full-height Riser Slot..........................................................................................33 3.2.2.2 Low Profile Riser Slot.........................................................................................33 3.2.2.3 I/OxAPIC Controller.....................................................
ページ6に含まれる内容の要旨
Table of Contents Intel® Server Board SE7520JR2 3.4.3 Interrupt Routing ....................................................................................................52 3.4.3.1 Legacy Interrupt Routing....................................................................................52 3.4.3.2 APIC Interrupt Routing .......................................................................................53 3.4.3.3 Legacy Interrupt Sources ................................................
ページ7に含まれる内容の要旨
Intel® Server Board SE7520JR2 Table of Contents 4.3 BIOS Power On Self Test (POST).........................................................................81 4.3.1 User Interface ........................................................................................................81 4.3.1.1 System Activity Window .....................................................................................82 4.3.1.2 Splash Screen/Diagnostic Window ...................................................
ページ8に含まれる内容の要旨
Table of Contents Intel® Server Board SE7520JR2 5.1 Platform Management Architecture Overview .....................................................115 5.1.1 5V Standby ..........................................................................................................116 5.1.2 IPMI Messaging, Commands, and Abstractions xxx............................................116 5.1.3 IPMI ‘Sensor Model’.............................................................................................
ページ9に含まれる内容の要旨
Intel® Server Board SE7520JR2 Table of Contents 5.3.17.2 User Model.....................................................................................................134 5.3.17.3 Request/Response Protocol ..........................................................................134 5.3.17.4 Host to mBMC Communication Interface.......................................................134 5.3.17.5 LAN Interface ....................................................................................
ページ10に含まれる内容の要旨
Table of Contents Intel® Server Board SE7520JR2 6.4.2 Diagnostic LEDs ..................................................................................................167 6.4.3 POST Code Checkpoints.....................................................................................168 6.4.4 Bootblock Initialization Code Checkpoints...........................................................170 6.4.5 Bootblock Recovery Code Checkpoint .........................................................
ページ11に含まれる内容の要旨
Intel® Server Board SE7520JR2 Table of Contents 8. Design and Environmental Specifications.....................................................................202 8.1 Server Board SE7520JR2 Design Specification..................................................202 8.2 Power Supply Requirements ...............................................................................202 8.2.1 Output Connectors...............................................................................................2
ページ12に含まれる内容の要旨
Table of Contents Intel® Server Board SE7520JR2 Appendix A: Integration and Usage Tips..............................................................................221 Glossary...................................................................................................................................222 Reference Documents ............................................................................................................225 xii Revision 1.0 C78844-002
ページ13に含まれる内容の要旨
Intel® Server Board SE7520JR2 List of Figures List of Figures Figure 1. SE7520JR2 Board Layout ...........................................................................................23 Figure 2. Server Board Dimensions............................................................................................25 Figure 3. Server Board SE7520JR2 Block Diagram ...................................................................26 Figure 4. CEK Processor Mounting ............................
ページ14に含まれる内容の要旨
List of Tables Intel® Server Board SE7520JR2 List of Tables Table 1: Baseboard Layout Reference .......................................................................................24 Table 2: Processor Support Matrix .............................................................................................28 Table 3: Supported DDR-266 DIMM Populations .......................................................................39 Table 4: Supported DDR-333 DIMM Populations .................
ページ15に含まれる内容の要旨
Intel® Server Board SE7520JR2 List of Tables Table 33: BIOS Setup, Boot Device Priority Sub-menu Selections ...........................................97 Table 34: BIOS Setup, Hard Disk Drive Sub-Menu Selections..................................................97 Table 35: BIOS Setup, Removable Drives Sub-menu Selections..............................................97 Table 36: BIOS Setup, CD/DVD Drives Sub-menu Selections..................................................97 Table 37: B
ページ16に含まれる内容の要旨
List of Tables Intel® Server Board SE7520JR2 Table 68: Error Codes and Messages ......................................................................................162 Table 69: Error Codes Sent to the Management Module .........................................................164 Table 70: BIOS Generated Beep Codes...................................................................................165 Table 71: Troubleshooting BIOS Beep Codes..................................................
ページ17に含まれる内容の要旨
Intel® Server Board SE7520JR2 List of Tables Table 103: External USB Connector Pin-out ............................................................................197 Table 104: Internal 1x10 USB Connector Pin-out (J1F1) .........................................................198 Table 105: Internal 2x5 USB Connector (J1G1) .......................................................................198 Table 106: CPU1/CPU2 Fan Connector Pin-out (J5F2, J7F1) ......................................
ページ18に含まれる内容の要旨
List of Tables Intel® Server Board SE7520JR2 < This page intentionally left blank. > xviii Revision 1.0 C78844-002
ページ19に含まれる内容の要旨
Intel® Server Board SE7520JR2 Introduction 1. Introduction This Technical Product Specification (TPS) provides detail to the architecture and feature set of ® the Intel Server Board SE7520JR2. The target audience for this document is anyone wishing to obtain more in depth detail of the server board than what is generally made available in the board’s Users Guide. It is a technical document meant to assist people with understanding and learning more about the specific features of the boar
ページ20に含まれる内容の要旨
Introduction Intel® Server Board SE7520JR2 1.2 Server Board Use Disclaimer Intel Corporation server boards contain a number of high-density VLSI and power delivery components that need adequate airflow to cool. Intel ensures through its own chassis development and testing that when Intel server building blocks are used together, the fully integrated system will meet the intended thermal requirements of these components. It is the responsibility of the system integrator who chooses not to u
