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SMC91C95
PRELIMINARY
ISA/PCMCIA Full Duplex Single-Chip
Ethernet and Modem Controller with RAM
FEATURES
• ISA/PCMCIA Single Chip Ethernet Controller • Optional External Flash Capability for XIP
With Modem Support (Execute in Place)
• 6 Kbytes Built-In RAM • Automatic Technology to Detect TX/RX
• Supports IEEE 802.3 (ANSI 8802-3) Ethernet 10BASE-T Tranceiver Pair Miswiring
Standards • Low Power CMOS Design
• Full Duplex Support • Supports Magic Packet Wakeup
• Hardware Memory Management Unit • 12
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TABLE OF CONTENTS FEATURES.......................................................................................................................................................1 PIN CONFIGURATION ....................................................................................................................................3 GENERAL DESCRIPTION...............................................................................................................................4 OVERVIEW ............
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Network Interface • Four Direct Driven LEDs for Status/ Diagnostics • Integrates 10BASE-T Transceiver Functions: Software Drivers - Driver and Receiver - Link Integrity Test • Uses Certified SMC9000 Drivers Which - Receive Polarity Detection and Operate with Every Major Network Correction Operating System • Integrates AUI Interface • Software Driver Compatible with • Implements 10 Mbps Manchester SMC91C92, SMC91C94 and SMC91C100 Encoding/Decoding and Clock Recovery (100 Mbps) Controllers in ISA
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GENERAL DESCRIPTION The SMC91C95 is a VLSI Ethernet Controller accessed with 40ns access times to any of its that combines ISA and PCMCIA interfaces, as registers, including its packet memory. No well as an interface to a companion modem DMA services are used by the SMC91C95; chip set, in one chip. The SMC91C95 virtually decoupling network traffic from local or integrates all the MAC and physical layer system bus utilization. For packet memory functions as well as the packet RAM needed to man
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receive are fully independent. It has 6 kbytes of read directly by the host. The remaining internal memory and the MMU manages parallel EEPROM can be used for XIP memory in 256 byte pages. The memory size applications, if needed. accommodates the increase in interrupt latency resulting from simultaneous LAN and modem The SMC91C95 integrates most of the 802.3 operation as well as the potential for functionality, incorporating the MAC layer simultaneous transmit and receive traffice in protocol
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Fast block move operation for load/unload: Resource allocation: CPU sees packet bytes as if stored Memory dynamically allocated for transmit contiguously and receive Handles 16 bit transfers regardless of Can automatically release memory on address alignment successful transmission Access to packet through fixed window Fast bus interface: Configuration: Compatible with ISA type and faster buses ISA: Uses non-volatile jumperless setup via Flexibility: serial EEPROM Flexible packet and header proc
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PIN REQUIREMENTS FUNCTION ISA PCMCIA NUMBER OF PINS SYSTEM ADDRESS BUS A0-A15 A0-A15 21 A16 nFWE A17 nFCS A18 A19 nCE1 nREG AEN SYSTEM DATA BUS D0-D15 D0-D15 16 SYSTEM CONTROL BUS RESET RESET 12 BALE nWE nIORD nIORD nIOWR nIOWR nMEMR nOE IOCHRDY nWAIT nIOCS16 nIOIS16 nSBHE nCE2 INTR0 nIREQ INTR1 nINPACK INTR2 nSTSCHG INTR3 MODEM INTERFACE nMRESET nMRESET 14 MINT MINT nMCS nMCS MRDY MRDY nMPWDN nMPWDN MIDLEN1 MIDLEN1 MRINGIN MRINGIN nMRINGOA nMRINGOA MRINGOB MRINGOB SPKRIN SPKRIN SPKROUT SPKROUT
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FUNCTION ISA PCMCIA NUMBER OF PINS CRYSTAL OSC. XTAL1 XTAL1 2 XTAL2 XTAL2 POWER VDD VDD 12 AVDD AVDD GROUND GND GND 12 AGND AGND 10BASE-T INTERFACE TPERXP TPERXP 6 TPERXN TPERXN TPETXP TPETXP TPETXN TPETXN TPETXDP TPETXDP TPETXDN TPETXDN AUI INTERFACE RECP RECP 6 RECN RECN COLP COLP COLN TXP/nCOLL COLN TXN/nCRS TXP/nCOLL TXN/nCRS LEDs nLNKLED/TXD nLNKLED/TXD 4 nRXLED/RXCLK nRXLED/RXCLK nBSELED/RXD nBSELED/RXD nTXLED/nTXEN nTXLED/nTXEN MISC. RBIAS RBIAS 7 WAKEUP WAKEUP nWAKEUPEN nWAKEUPEN PWRDWN/
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DESCRIPTION OF PIN FUNCTIONS PIN NO. NAME SYMBOL TYPE DESCRIPTION 113 nROM/ I/O4 with This pin is sampled at the end of RESET. nPCMCIA pullup When this pin is sampled low the SMC91C95 is configured for PCMCIA operation and all pin definitions correspond to the PCMCIA mode. For ISA operation this pin is left open and is used as a ROM chip select output that goes active when nMEMR is low and the address bus contains a valid ROM address. 35, 36, Address 0- A0-A15 I Input address lines 0 through 15.
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DESCRIPTION OF PIN FUNCTIONS PIN NO. NAME SYMBOL TYPE DESCRIPTION 81 nByte High nSBHE I with pullup ISA - Byte High Enable input. Asserted (low) Enable by the system to indicate a data transfer on the upper data byte. nCard nCE2 PCMCIA - Card Enable 2 input. Used to Enable 2 select card on odd byte accesses. 83 Ready IOCHRDY OD24 with ISA - Output. Optionally used by the pullup SMC91C95 to extend host cycles. nWait nWAIT PCMCIA - Output. Optionally used by the SMC91C95 to extend host cycles. 59,
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DESCRIPTION OF PIN FUNCTIONS PIN NO. NAME SYMBOL TYPE DESCRIPTION nInterrupt nIREQ PCMCIA - Active low interrupt request output. Request Pin acts as a Ready pin during power-up. The pin should be pulled low within 10us of the application of the VCC or Reset (which ever occurs later). It remains low(0) until the CIS is loaded in the Internal SRAM. The high(1) state indicates to the host controller that the device is ready. 91 Interrupt 1 INTR1 O24 ISA - Output. Active high interrupt signal. The
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DESCRIPTION OF PIN FUNCTIONS PIN NO. NAME SYMBOL TYPE DESCRIPTION nIOIS16 PCMCIA - Active low output asserted whenever the SMC91C95 is in 16 bit mode, and “Enable Function” bit in the ECOR register is high, nREG is low and A4-A15 decode to the LAN address specified in I/O Base Registers 0 and 1 in PCMCIA attribute space. 88 nI/O Read nIORD IS with Input. Active low read strobe used to access pullup the SMC91C95 IO space. 87 nI/O Write nIOWR IS with Input. Active low write strobe used to access p
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DESCRIPTION OF PIN FUNCTIONS PIN NO. NAME SYMBOL TYPE DESCRIPTION 26 MIDLEN1 O4 Powerdown output to modem controller. This pin is active (high) when either the PWRDWN bit (CSR bit 2) is set or the modem is disabled (not configured). 20 Modem Ring MRINGIN I Ring input from the modem controller. Input Toggles when ringing, low when not ringing. 21 nModem nMRINGOA O4 Ring output signal. When there is no ringing Ring Output on the MRINGIN pin and the modem is not in A Powerdown mode this output is h
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DESCRIPTION OF PIN FUNCTIONS PIN NO. NAME SYMBOL TYPE DESCRIPTION 16 n16 Bit nMIS16 I with pullup Input. When low, it indicates a 16 bit modem, Modem otherwise the modem is 8 bit wide. Used to determine if nIOIS16 (PCMCIA) and nIOCS16 (ISA) need to be asserted for modem cycles. The value of this pin may change from cycle to cycle. 110 EEPROM EESK O4 Output. 4μs clock used to shift data in and out Clock of the serial EEPROM. 109 EEPROM EECS O4 Output. Serial EEPROM chip select. Chip Select 108 EE
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DESCRIPTION OF PIN FUNCTIONS PIN NO. NAME SYMBOL TYPE DESCRIPTION 10 nReceive nRXLED OD16 Internal ENDEC - Receive LED output. LED Receive RXCLK I with pullup External ENDEC - Receive clock input. Clock 11 nLink LED nLNKLED OD16 Internal ENDEC - Link LED output. Transmit TXD 0162 External ENDEC - Transmit Data output. Data 111 Enable ENEEP I with pullup Input. This active high input enables the EEPROM EEPROM to be read or written by the SMC91C95. Internally pulled up. Must be connected to ground
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DESCRIPTION OF PIN FUNCTIONS PIN NO. NAME SYMBOL TYPE DESCRIPTION 125 AUI Collision COLP Diff. Input AUI collision differential inputs. A collision is COLN indicated by a 10 MHz signal at this input pair. 126 121 TPE Receive TPERXP Diff. Input 10BASE-T receive differential inputs. TPERXN 122 4 TPE TPETXP Diff. Output Internal ENDEC - 10BASE-T transmit Transmit TPETXN differential outputs. 6 5 TPE TPETXDP Diff. Output 10BASE-T delayed transmit differential Transmit TPETXDN outputs. Used in combin
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DESCRIPTION OF PIN FUNCTIONS PIN NO. NAME SYMBOL TYPE DESCRIPTION 116 nExternal nXENDEC I with pullup When tied low the SMC91C95 is configured ENDEC for external ENDEC. When tied high or left open the SMC91C95 will use its internal encoder/decoder. 13, 25, Power VDD +5V power supply pins 37, 51, 62, 71, 80, 89, 104 1, 117, Analog AVDD +5V analog power supply pins 120 Power 19, 30, Ground VSS Ground pins 44, 58, 67, 75, 84, 94, 112 8, 119, Analog AVSS Analog ground pins 127 Ground BUFFER TYPES O4
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10BASET AUI CABLE SIDE Figure 1 - SMC91C95 System Block Diagram for ISA Bus with Boot PROM 18 DIAGNOSTIC LEDs 20 MHz 4 SYSTEM BUS 4 N16 ENEEP IOS0 IOS1 IOS2 nE EEDO L1 XTAL2 EEDI XTA TPETXP CS EESK EE AEN TPETXN N/C BALE TPETXDP RESET TPETXDN nSBHE TPERXP nIORD, nIOWR, 3 nMEMR TPERXN TXP TXN RECP RECN D0-15 COLP COLN A0-19 BIAS R IOCHRDY INTR0-3 nROM nIOCS16 4 ADDRESS BUFFER DATA O PR M nIRQ SERIAL SMC91C95 EEPROM
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PCMCIA CONNECTOR nCE1 nCE2 nREG nWE 10BASE-T/AUI A0-A9, A15 INTERFACE nIORD nIOWR SPKROUT STSCHG nMRESET nRESET RESET MINT INT PHONE LINE nIREQ nMCS nCS D0-D15 SMC91C95 MRDY RDY nIOIS16 nINPACK MODEM CHIPSET MPWDN PWDN nWAIT MRINGIN RINGIN nOE RINGOUTB MRINGOB nFWE SPKRIN SPKR nFCS nWE nCE CS,SK,DI,DO nOE EXTENDED SERIAL EPROM ATTRIBUTE D0-D7 EPROM (ISA-Hy9346) 2816 (PCMCIA-Hy93c66) A0-X (Optional) Figure 2 - SMC91C95 System Block Diagram for Dual Function PCMCIA Card 19
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MODEM DATA INTERFACE BUS ADDRESS MANAGEMENT CSMA/CD ENDEC AUI ARBITER BUS BUS INTERFACE CONTROL MMU TWISTED PAIR 10BASE-T TRANSCEIVER RAM Figure 3 - SMC91C95 Internal Block Diagram 20
