Summary of the content on the page No. 1
®
®
IBM PowerPC 970MP RISC Microprocessor
Application Note
®
PowerPC 970MP Differences
(Includes Differences for 970FX to 970MP)
Version: 1.0
Preliminary
November 15, 2006
Summary of the content on the page No. 2
Application Note (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor Preliminary Copyright and Disclaimer © Copyright International Business Machines Corporation 2004, 2005, 2006 All Rights Reserved Printed in the United States of America November 2006 The following are trademarks of International Business Machines Corporation in the United States, or other countries, or both. IBM IBM Logo PowerPC PowerPC Logo PowerPC 970FX PowerPC Architecture PowerPC 970MP Power
Summary of the content on the page No. 3
Application Note (Includes Differences for 970FX to 970MP) ® Preliminary IBM PowerPC 970MP RISC Microprocessor 1. Abstract ....................................................................................................................... 9 2. Overview ...................................................................................................................... 9 3. Processor Version Register (PVR) ............................................................................ 9 4. Gen
Summary of the content on the page No. 4
Application Note (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor Preliminary AppNote_970FX-MP_Differences_TOC.fm.1.0 November 15, 2006 Page 4 of 25
Summary of the content on the page No. 5
Application Note (Includes Differences for 970FX to 970MP) ® Preliminary IBM PowerPC 970MP RISC Microprocessor Figure 5-1. Dual Cores sharing processor interface ................................................................................. 11 Figure 5-2. 970MP Power Modes ............................................................................................................. 17 Figure 8-1. PowerPC 970MP Mechanical Package (Side and Top View) ............................................
Summary of the content on the page No. 6
Application Note (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor Preliminary AppNote_970FX-MP_Differences_LOF.fm.1.0 November 15, 2006 Page 6 of 25
Summary of the content on the page No. 7
Application Note (Includes Differences for 970FX to 970MP) ® Preliminary IBM PowerPC 970MP RISC Microprocessor Table 3-1. PowerPC 970FX and 970MP Processor Version Registers (PVR) .......................................... 9 Table 4-1. General Parameters of the PowerPC 970FX and 970MP ...................................................... 10 Table 5-1. PowerPC 970MP Programmable Delay Parameters ............................................................. 16 Table 5-2. Power Mode States ......
Summary of the content on the page No. 8
Application Note (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor Preliminary AppNote_970FX-MP_Differences_LOT.fm.1.0 November 15, 2006 Page 8 of 25
Summary of the content on the page No. 9
Application Note (Includes Differences for 970FX to 970MP) ® Preliminary IBM PowerPC 970MP RISC Microprocessor 1. Abstract ® This preliminary application note describes the differences between the PowerPC 970FX microprocessor and PowerPC 970MP microprocessor. The primary objective of the PowerPC 970FX remap to the 970MP is to achieve a high frequency dual core processor. The design changes include a 1MB L2 cache per core, support for higher bus speeds, power management improvements, and erra
Summary of the content on the page No. 10
Application Note (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor Preliminary 4. General Parameters Table 4-1 provides a summary of the general parameters for the PowerPC 970FX and 970MP. Table 4-1. General Parameters of the PowerPC 970FX and 970MP Item 970FX Description 970MP Description Die Size 66.2 sq. mm 153.8 sq. mm Die Dimensions 7.07mm x 9.36mm 13.225 mm x 11.629 mm Transistor Count 52 million 183 Million Logic Design Static with some dynamic logic Sta
Summary of the content on the page No. 11
Application Note (Includes Differences for 970FX to 970MP) ® Preliminary IBM PowerPC 970MP RISC Microprocessor scheme, with provisions for adjusting priorities when one core receives repeated serial retries. Logic in the BIU of each PU is modified to allow the arbiter to hold that PU from sending data to the PI bus when a trans- action from the other processor is in progress. The PI bus configuration parameters apply to the single bus, not to the individual processors, and so this arbiter enf
Summary of the content on the page No. 12
Application Note (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor Preliminary 5.1.1 1MB L2 Cache per Core The 970MP L2 cache design doubles the cache array size and capacity from 970FX, with a corresponding doubling in size of the two copies of the L2 tag arrays. Like the 970FX, it is an 8-way set associative cache of 128 B lines, but now consists of 1024 sets. The latency for L1 misses that hit in the L2 is increased by two processor cycles in the 970MP, due
Summary of the content on the page No. 13
Application Note (Includes Differences for 970FX to 970MP) ® Preliminary IBM PowerPC 970MP RISC Microprocessor 5.2 Processor Interconnect Bus The 970MP design incorporates an enhanced Processor Interconnect (PI) Interface for its high-speed off-chip bus. There are a number of changes to the physical interface and support hardware associated with the use of the enhanced definition from that in the 970FX. These changes include modifications to the driver and receiver, two new test modes of ope
Summary of the content on the page No. 14
Application Note (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor Preliminary are transmitting ‘0’ bits. This process repeats itself until the 16 consecutive ‘1’ bits have been walked in sequence across all channels. The electrical shorts test mode is enabled by setting the following I/O SCOM mode register 0 bits: ESTMODE to ‘1’, WIAP to ‘1’, and RDTMODE to ‘1’. Once enabled the shorts test will create the sequential patterns across all data channels, and the
Summary of the content on the page No. 15
Application Note (Includes Differences for 970FX to 970MP) ® Preliminary IBM PowerPC 970MP RISC Microprocessor If the expected results are not observed, an error is flagged in the status register. The DIAG_RDT vector out of the receiver provides observability of individual channel failures. The status register, bit 1, also indicates that the shorts test is complete. Completion of the shorts test within a reasonable period of time should be verified after the test is initiated with SCOM mode
Summary of the content on the page No. 16
Application Note (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor Preliminary Section 11.4 of the 970FX User’s Manual are set to system dependent values during initialization, and must account for these larger latencies in the 970MP. The range of values that may be specified for each of these parameters for the 970MP is: Table 5-1. PowerPC 970MP Programmable Delay Parameters Parameter Min. Max COMPACE 2 14 STATLAT 4 30 SNOOPLAT 6 12 SNOOPACC 9 24 In addition,
Summary of the content on the page No. 17
Application Note (Includes Differences for 970FX to 970MP) ® Preliminary IBM PowerPC 970MP RISC Microprocessor 5.3 PowerTuning 5.3.1 Power Modes The twelve power states associated with the power tuning engine frequency scaling facility on the 970MP are indicated by the nodes S1 through S12 in Figure 5-2. Figure 5-2. 970MP Power Modes Deep Doze Run Nap Nap L2/R2 L1/R1 S2 S3 L4 R3 R5 High S1 S4 R6 Speed L7/R7 L21/R21 L9/R9 S6 S7 L8/R8 L11 Medium R10 R12 S8 S5 Speed R13 L14/R14 L16/R16 S10 S11
Summary of the content on the page No. 18
Application Note (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor Preliminary Table 5-2 describes the twelve power mode states. Table 5-2. Power Mode States State Description S1 Full Run, High Speed S2 Doze, High Speed S3 Nap, High Speed S4 Deep Nap, High S5 Full Run, Medium Speed S6 Doze, Medium Speed S7 Nap, Medium Speed S8 Deep Nap, Medium S9 Full Run, Low Speed S10 Doze, Low Speed S11 Nap, Low Speed S12 Deep Nap, Low 5.3.2 Time Base and Decrementer The time
Summary of the content on the page No. 19
Application Note (Includes Differences for 970FX to 970MP) ® Preliminary IBM PowerPC 970MP RISC Microprocessor The transition from quarter to full frequency is handled in two stages. First, the processor is transitioned from quarter frequency to half frequency using the quarter to half dither pattern. The processor is paused for 32 cycles at half frequency, and then transitioned to full frequency using the half to full dither pattern. A similar procedure is used for the full to quarter frequ
Summary of the content on the page No. 20
Application Note (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor Preliminary 6. System Design Information The 970MP supports a 24:1 bus ratio for test purposes instead of the 16:1 bus ratio supported in the 970FX. The BUS_CFG(0:2) pin setting for this 24:1 bus ratio is ‘110’, which is the same setting that was used to select the 16:1 bus ratio in the 970FX. Unlike the 970FX, ANALOG_GND is not shorted to GND within the 970MP. Please refer to the IBM PowerPC 9
