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Intel 955X Express Chipset
Thermal/Mechanical Design Guide
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– For the Intel 82955X Memory Controller Hub (MCH)
April 2005
Document Number: 307012-001
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R ® INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATI
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R Contents 1 Introduction ......................................................................................................................... 7 1.1 Definition of Terms ................................................................................................. 8 1.2 Reference Documents............................................................................................ 8 2 Packaging Technology........................................................................
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R Figures Figure 2-1. MCH Package Dimensions (Top View)............................................................ 9 Figure 2-2. MCH Package Dimensions (Side View)........................................................... 9 Figure 2-3. MCH Package Dimensions (Bottom View)..................................................... 10 Figure 5-1. Thermal Solution Decision Flowchart............................................................. 16 Figure 5-2. Zero Degree Angle Attach Methodolog
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R Revision History Revision Description Revision Date Number -001 • Initial Release. April 2005 § ® Intel 955X Express Chipset Thermal/Mechanical Design Guide 5
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R ® 6 Intel 955X Express Chipset Thermal/Mechanical Design Guide
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Introduction R 1 Introduction As the complexity of computer systems increases, so do the power dissipation requirements. Care must be taken to ensure that the additional power is properly dissipated. Typical methods to improve heat dissipation include selective use of ducting, and/or passive heatsinks. The goals of this document are to: ® • Outline the thermal and mechanical operating limits and specifications for the Intel 82955X Express Chipset Memory Controller Hub (MCH). • Desc
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Introduction R 1.1 Definition of Terms Term Description BGA Ball grid array. A package type, defined by a resin-fiber substrate, onto which a die is mounted, bonded and encapsulated in molding compound. The primary electrical interface is an array of solder balls attached to the substrate opposite the die and molding compound. BLT Bond line thickness. Final settled thickness of the thermal interface material after installation of heatsink. ICH7 I/O Controller Hub. Seventh generati
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Packaging Technology R 2 Packaging Technology The 955X Express chipset consists of two individual components: the MCH and the ICH7. The MCH component uses a 34 mm squared, 6-layer flip chip ball grid array (FC-BGA) package (see ® Figure 2-1 through Figure 2-3). For information on the ICH7 package, refer to the Intel I/O Controller Hub 7 (ICH7) Thermal Design Guidelines. Figure 2-1. MCH Package Dimensions (Top View) Ø5.20mm Capacitor Area, Handling Exclusion Die 19.38 Zone Keepout 1
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Packaging Technology R Figure 2-3. MCH Package Dimensions (Bottom View) NOTES: 1. All dimensions are in millimeters. 2. All dimensions and tolerances conform to ANSI Y14.5M-1994. 2.1 Package Mechanical Requirements The MCH package has an exposed bare die that is capable of sustaining a maximum static normal load of 10-lbf. The package is NOT capable of sustaining a dynamic or static compressive load applied to any edge of the bare die. These mechanical load limits must not be exc
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Thermal Specifications R 3 Thermal Specifications 3.1 Thermal Design Power (TDP) Analysis indicates that real applications are unlikely to cause the chipset MCH to consume maximum power dissipation for sustained time periods. Therefore, to arrive at a more realistic power level for thermal design purposes, Intel characterizes power consumption based on known platform benchmark applications. The resulting power consumption is referred to as the Thermal Design Power (TDP). TDP is the
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Thermal Specifications R ® 12 Intel 955X Express Chipset Thermal/Mechanical Design Guide
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Thermal Simulation R 4 Thermal Simulation Intel provides thermal simulation models of the 955X Express chipset MCH and associated user's guides to aid system designers in simulating, analyzing, and optimizing their thermal solutions in an integrated, system-level environment. The models are for use with the commercially available Computational Fluid Dynamics (CFD)-based thermal analysis tool “FLOTHERM”* (version 5.1 or higher) by Flomerics, Inc. Contact your Intel field sales represe
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Thermal Simulation R ® 14 Intel 955X Express Chipset Thermal/Mechanical Design Guide
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Thermal Metrology R 5 Thermal Metrology The system designer must make temperature measurements to accurately determine the thermal performance of the system. Intel has established guidelines for proper techniques to measure the MCH die temperatures. Section 5.1 provides guidelines on how to accurately measure the MCH die temperatures. The flowchart in Figure 5-1 offers useful guidelines for thermal performance and evaluation. 5.1 Die Case Temperature Measurements To ensure function
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Thermal Metrology R Figure 5-1. Thermal Solution Decision Flowchart Start Attach Run the Power thermocouples using Attach device program and recommended Tdie > to board using monitor the No metrology. Setup the Specification? normal reflow device die system in the desired process. temperature. configuration. End Heatsink Select Heatsink Yes Required Therm_Solution_Flow Figure 5-2. Zero Degree Angle Attach Methodology Figure 5-3. Zero Degree Angle Attach Methodology (Top View) Di
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Reference Thermal Solution R 6 Reference Thermal Solution Intel has developed a reference thermal solution designed to meet the cooling needs of the MCH under operating environments and specifications defined in this document. This chapter describes the overall requirements for the Plastic Wave Soldering Heatsink (PWSH) reference thermal solution including critical-to-function dimensions, operating environment, and validation criteria. Other chipset components may or may not need att
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Reference Thermal Solution R Figure 6-1. Reference Heatsink Measured Thermal Performance versus Approach Velocity 6.3 Mechanical Design Envelope While each design may have unique mechanical volume and height restrictions or implementation requirements, the height, width, and depth constraints typically placed on the MCH thermal solution are shown in Figure 6-2. When using heatsinks that extend beyond the MCH reference heatsink envelope shown in Figure 6-2, any motherboard components
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Reference Thermal Solution R Figure 6-2. Heatsink Volumetric Envelope for the MCH Ram p Retainer Heatsink Fin Heatsink Base TIM Die FCBGA + Solder Balls Motherboard 60.6 mm 48.0 mm 26.79 mm TNB Heatsink Fin Max 2. 2 m m Component Height No component O 135 this Area 47.0 mm HS_Vol_Envelope_MCH ® Intel 955X Express Chipset Thermal/Mechanical Design Guide 19 81.0 mm 67.0 mm 45.79 mm 60.92 mm 2.50 mm 1.90 mm 33.50 mm
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Reference Thermal Solution R 6.4 Board-Level Components Keep-out Dimensions The location of hole patterns and keep-out zones for the reference thermal solution are shown in Figure 6-3 and Figure 6-4. Figure 6-3. MCH Heatsink Board Component Keep-out 60.6 mm 48.0 mm 26.79 mm TNB Heatsink Fin Max 2.2 mm Component Height No component O 135 this Area 47.0 mm Air Flow HS_Brd_Component_Keepout ® 20 Intel 955X Express Chipset Thermal/Mechanical Design Guide 81.0 mm 67.0 mm 45.79 mm 60.92
