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® ®
SHARC EZ-Extender
Manual
Revision 3.0, April 2006
Part Number
82-000805-01
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
a
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Copyright Information ©2006 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent from Analog Devices, Inc. Printed in the USA. Limited Warranty The SHARC EZ-Extender is warranted against defects in materials and workmanship for a period of one year from the date of purchase from Analog Devices or from an authorized dealer. Disclaimer Analog Devices, Inc. reserves the right to change this product without prior noti
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Regulatory Compliance The SHARC EZ-Extender has been certified to comply with the essential requirements of the European EMC directive 89/336/EEC (inclusive 93/68/EEC) and, therefore, carries the “CE” mark. The SHARC EZ-Extender has been appended to Analog Devices Devel- opment Tools Technical Construction File referenced “DSPTOOLS1” dated December 21, 1997 and was awarded CE Certification by an appointed European Competent Body and is on file. The EZ-KIT Lite evaluation system contains
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iv SHARC EZ-Extender Manual
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CONTENTS PREFACE Purpose of This Manual ................................................................ viii Intended Audience .......................................................................... ix Manual Contents ............................................................................ ix What’s New in This Manual ............................................................. x Technical or Customer Support ........................................................ x Supported Products
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CONTENTS DIP Switches and Jumpers ............................................................ 2-3 Direction/Clock Source Control Switch (SW1) ........................ 2-3 MISO Disconnect Jumper (P6) ............................................... 2-5 SMA Connector Clock Disconnect Jumper (P10) .................... 2-5 EZ-EXTENDER BILL OF MATERIALS EZ-EXTENDER SCHEMATIC Title Page ..................................................................................... B-1 Expansion Connector P1 ...
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PREFACE ® ® Thank you for purchasing the SHARC EZ-Extender , Analog Devices ® (ADI) extension board to the EZ-KIT Lite evaluation system for ADSP-21262 SHARC processors. The SHARC processors are based on a 32-bit super Harvard architecture that includes a unique memory architecture comprised of two large - on-chip, dual-ported SRAM blocks coupled with a sophisticated IO pro cessor, which gives SHARC the bandwidth for sustained high-speed computations. SHARC represents today’s de facto stan
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Purpose of This Manual The board extends the capabilities of the evaluation system by providing a connection between the parallel data access port (PDAP) of the ADSP-21262 processor and an Analog Devices analog-to-digital high-speed converter (ADC HSC) evaluation board. Moreover, the extender broadens the range of the EZ-KIT Lite applications by providing surface-mounted (SMT) footprints for breadboard capabilities and access to all of the pins on the EZ-KIT Lite’s expansion interface. Th
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Preface Intended Audience This manual is a user’s guide and reference to the SHARC EZ-Extender. Programmers who are familiar with the Analog Devices SHARC processor architecture, operation, and development tools are the primary audience for this manual. Programmers who are unfamiliar with VisualDSP++ or EZ-KIT Lite eval- uation software should refer to the ADSP-21262 EZ-KIT Lite Evaluation System Manual, VisualDSP++ online Help, and user’s or getting started “Related guides. For the locati
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What’s New in This Manual Appendix B,“EZ-Extender Schematic” on page B-1 Provides the resources to allow modifications to the EZ-Extender or to use as a reference design. Appendix B now is part of the online Help. The PDF version of the SHARC EZ-Extender Manual is located in the Docs\EZ-KIT Lite Manuals folder on the installation CD. Alternatively, the book can be found at the Analog Devices Web site, www.analog.com/processors. What’s New in This Manual This edition of the SHARC EZ-E
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Preface Contact your Analog Devices, Inc. local sales office or authorized distributor Send questions by mail to: Analog Devices, Inc. One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 USA Supported Products The SHARC EZ-Extender is designed as an extension to the ADSP-21262 EZ-KIT Lite evaluation system. Product Information You can obtain product information from the Analog Devices Web site, from the product CD-ROM, or from the printed publications (manuals). Analog Devices is
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Product Information Registration: Visit www.myanalog.com to sign up. Click Register to use MyAnalog.com. Registration takes about five minutes and serves as means for you to select the information you want to receive. If you are already a registered user, just log on. Your user name is your e-mail address. Processor Product Information For information on embedded processors and DSPs, visit our Web site at www.analog.com/processors, which provides access to technical publica- tions, data she
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Preface Table 1. Related Processor Publications Title Description ADSP-21262 SHARC Microprocessor Datasheet General functional description, pinout, and timing ADSP-2126x SHARC DSP Core Manual Description of internal processor architecture, ADSP-2126x SHARC DSP Peripherals Manual registers, and all peripheral functions ADSP-21160 SHARC DSP Instruction Set Description of all allowed processor assembly Reference instructions Table 2. Related VisualDSP++ Publications Title Description VisualDSP
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Product Information Online Technical Documentation Online documentation comprises the VisualDSP++ Help system, software tools manuals, hardware tools manuals, processor manuals, the Dinkum Abridged C++ library, and Flexible License Manager (FlexLM) network license manager software documentation. You can easily search across the entire VisualDSP++ documentation set for any topic of interest. For easy printing, supplementary .PDF files of most manuals are provided in the Docs folder on the V
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Preface Notation Conventions Text conventions used in this manual are identified and described as follows. Example Description {this | that} Alternative required items in syntax descriptions appear within curly brackets and separated by vertical bars; read the example as this or that. One or the other is required. [this | that] Optional items in syntax descriptions appear within brackets and sepa- rated by vertical bars; read the example as an optional this or that. [this,…] Optional item li
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Notation Conventions xvi SHARC EZ-Extender Manual
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1 EZ-EXTENDER INTERFACES This chapter relates how the extender interfaces with the compatible boards. The information is presented in the following sections. “ADC HSC Interface” on page 1-1 “Breadboard Area” on page 1-2 ADC HSC Interface The SHARC EZ-Extender can connect to an analog-to-digital high-speed converter (ADC HSC) evaluation board via the ADC HSC interface. The ADC HSC interface consists of a 40-pin female header, which contains all of the control and data signals necessary to
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Breadboard Area Switch (SW1)” on page 2-3. The setup of the general-purpose signals DAI_P15_GP1 and DAI_P16_GP2 is dependent on the specific ADC HSC evaluation board being interfaced; therefore, the board’s model must be taken into consideration. The data bus of the EZ-Extender must be enabled before data is read. Enable the data bus by a memory read from address 0x160 0000, which the AD[15:0] pins set up as the external port. Then, the AD[15:0] pins can be set up in PDAP mode. A list of
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2 EZ-EXTENDER HARDWARE REFERENCE This chapter describes the hardware design of the SHARC EZ-Extender. The following topics are covered. “System Architecture” on page 2-1 Describes the configuration of the extender and explains how the board components interface with the processor and EZ-KIT Lite. “DIP Switches and Jumpers” on page 2-3 Describes the function of the configuration DIP switches and jumpers. System Architecture A detailed block diagram of the SHARC EZ-Extenderis shown in F
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System Architecture Figure 2-1. SHARC EZ-Extender Block Diagram The block diagram in Figure 2-1 shows that each clock and general-pur- pose signal attached to the analog-to-digital high-speed converter (ADC HSC) interface is configured depending on how the interface operates. The EZ-Extender has two clock signals, TX_CLK and RX_CLK. The TX_CLK signal is used as an output and can be generated in three ways: by applying a signal via an SMA connector, by using the RX_CLK signal, or by populat- 2
