ページ1に含まれる内容の要旨
-- DISCONTINUED PRODUCT --
LogiCORE™ IP
1-Gigabit Ethernet
MAC v8.5
User Guide
UG144 April 24, 2009
R
ページ2に含まれる内容の要旨
-- DISCONTINUED PRODUCT -- R Xilinx is providing this product documentation, hereinafter “Information,” to you “AS IS” with no warranty of any kind, express or implied. Xilinx makes no representation that the Information, or any particular implementation thereof, is free from any claims of infringement. You are responsible for obtaining any rights you may require for any implementation based on the Information. All specifications are subject to change without notice. XILINX EXPRESSLY DISCLAIM
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-- DISCONTINUED PRODUCT -- Revision History The following table shows the revision history for this document. Date Version Revision 09/30/04 1.0 Initial Xilinx release. 04/28/05 2.0 Updated to 1-Gigabit Ethernet MAC version 6.0, Xilinx tools v7.1i SP1. 01/18/06 3.0 Updated to 1-Gigabit Ethernet MAC version 7.0, Xilinx tools v8.1i. 07/13/06 4.0 Updated to 1-Gigabit Ethernet MAC version 8.0, Xilinx tools v8.2i. 09/21/06 4.1 Updated to 1-Gigabit Ethernet MAC version 8.1, added support for Spartan®
ページ4に含まれる内容の要旨
-- DISCONTINUED PRODUCT -- www.xilinx.com 1-Gigabit Ethernet MAC v8.5 User Guide UG144 April 24, 2009
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-- DISCONTINUED PRODUCT -- Table of Contents Schedule of Figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Schedule of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Preface: About This Guide Guide Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Conventions .
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-- DISCONTINUED PRODUCT -- R Chapter 4: Designing with the Core General Design Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Design Steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Know the Degree of Difficulty . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Keep it Registered . . . . . . . . . . . . .
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-- DISCONTINUED PRODUCT -- R Connecting the MDIO to an Internally Integrated PHY . . . . . . . . . . . . . . . . . . . . . . . . 76 Connecting the MDIO to an External PHY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Chapter 8: Configuration and Status Using the Optional Management Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Host Clock Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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-- DISCONTINUED PRODUCT -- R Chapter 12: Implementing Your Design Pre-implementation Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 Using the Simulation Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 Synthesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 XST—VHDL . . . . . . . . . . . . . . . .
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-- DISCONTINUED PRODUCT -- Schedule of Figures Chapter 1: Introduction Chapter 2: Core Architecture Figure 2-1: Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 2-2: Component Pinout for MAC with Optional Management Interface . . . . . . 23 Figure 2-3: Component Pinout for MAC without Optional Management Interface and with Optional Address Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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-- DISCONTINUED PRODUCT -- R Chapter 7: Using the Physical Side Interface Figure 7-1: External GMII Transmitter Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 7-2: External GMII Receiver Logic for Spartan-3, Spartan-3E, and Spartan-3A Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Figure 7-3: External GMII Receiver Logic for Virtex-5 Devices . . . . . . . . . . . . . . .
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-- DISCONTINUED PRODUCT -- R Chapter 11: Interfacing to Other Cores Figure 11-1: 1-Gigabit Ethernet MAC Extended to Include 1000BASE-X PCS with TBI 114 Figure 11-2: 1-Gigabit Ethernet MAC Extended to Include 1000BASE-X PCS and PMA using a RocketIO Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 Figure 11-3: 1-Gigabit Ethernet MAC Extended to Include 1000BASE-X PCS and PMA using a RocketIO transceiver. . . . . . . . . . . . . . .
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-- DISCONTINUED PRODUCT -- R 12 www.xilinx.com 1-Gigabit Ethernet MAC v8.5 User Guide UG144 April 24, 2009
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-- DISCONTINUED PRODUCT -- Schedule of Tables Chapter 1: Introduction Chapter 2: Core Architecture Table 2-1: Transmitter Client Interface Signal Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 2-2: Receive Client Interface Signal Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 2-3: Flow Control Interface Signal Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 2-4: Optional Management Interf
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-- DISCONTINUED PRODUCT -- R Table 8-8: Unicast Address Word 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Table 8-9: Unicast Address Word 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Table 8-10: Address Table Configuration Word 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 Table 8-11: Address Table Configuration Word 1 . . . . . . . . . . . . . . . . . . . . . . .
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-- DISCONTINUED PRODUCT -- R Preface About This Guide The LogiCORE™ IP 1-Gigabit Ethernet MAC User Guide provides information about generating the core, customizing and simulating the core utilizing the provided example design, and running the design files through implementation using the Xilinx tools. Guide Contents This guide contains the following chapters: • Preface, “About this Guide” introduces the organization and purpose of the guide and the conventions used in this document. • Chapt
ページ16に含まれる内容の要旨
-- DISCONTINUED PRODUCT -- R Preface: About This Guide Conventions This document uses the following conventions. An example illustrates each convention. Typographical The following typographical conventions are used in this document: Convention Meaning or Use Example Messages, prompts, and Courier font program files that the system speed grade: - 100 displays Literal commands you enter in Courier bold ngdbuild design_name a syntactical statement Variables in a syntax See the Development System
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-- DISCONTINUED PRODUCT -- R Conventions Online Document The following linking conventions are used in this document: Convention Meaning or Use Example See the section “Additional Cross-reference link to a Resources” for details. Blue text location in the current See “Title Formats” in document Chapter 1 for details. Go to www.xilinx.com for the Blue, underlined text Hyperlink to a website (URL) latest speed files. List of Acronyms The following table describes acronyms used in this manual
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-- DISCONTINUED PRODUCT -- R Preface: About This Guide Acronym Spelled Out NCD Native Circuit Description NGC Native Generic Circuit NGD Native Generic Database ns nanoseconds PCB Printed Circuit Board PCS Physical Coding Sublayer PHY physical-side interface PMA Physical Medium Attachment PMD Physical Medium Dependent RGMII Reduced Gigabit Media Independent Interface SGMII Serial Gigabit Media Independent Interface VHDL VHSIC Hardware Description Language (VHSIC an acronym for Very High-Speed
ページ19に含まれる内容の要旨
-- DISCONTINUED PRODUCT -- R Chapter 1 Introduction The 1-Gigabit Ethernet MAC (GEMAC) core is a fully verified solution that supports Verilog-HDL and VHDL. In addition, the example design provided with the core is provided in both Verilog and VHDL. This chapter introduces the GEMAC core and provides other related information, including recommended design experience, additional resources, technical support, and ways to submit feedback to Xilinx. About the Core The GEMAC core is a Xilinx CO
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-- DISCONTINUED PRODUCT -- R Chapter 1: Introduction Specifications • IEEE 802.3 2005 • Reduced Gigabit Media Independent Interface (RGMII) version 2.0 Technical Support For technical support, see support.xilinx.com/. Questions are routed to a team of engineers with expertise using the GEMAC core. Xilinx will provide technical support for use of this product as described in the 1-Gigabit Ethernet MAC User Guide and the 1-Gigabit Ethernet MAC Getting Started Guide. Xilinx cannot guarantee timi
