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®
ARM Developer Suite
Version 1.2
Assembler Guide
Copyright © 2000, 2001 ARM Limited. All rights reserved.
ARM DUI 0068B
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ARM Developer Suite Assembler Guide Copyright © 2000, 2001 ARM Limited. All rights reserved. Release Information The following changes have been made to this book. Change History Date Issue Change November 2000 A Release 1.1 November 2001 B Release 1.2 Proprietary Notice ® ™ Words and logos marked with or are registered trademarks or trademarks owned by ARM Limited. Other brands and names mentioned herein may be the trademarks of their respective owners. Neither the whole nor any part of th
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Contents ARM Developer Suite Assembler Guide Preface About this book .............................................................................................. vi Feedback ....................................................................................................... ix Chapter 1 Introduction 1.1 About the ARM Developer Suite assemblers .............................................. 1-2 Chapter 2 Writing ARM and Thumb Assembly Language 2.1 Introduction ...............................
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Contents 3.2 Format of source lines ................................................................................ 3-8 3.3 Predefined register and coprocessor names .............................................. 3-9 3.4 Built-in variables ....................................................................................... 3-10 3.5 Symbols .................................................................................................... 3-12 3.6 Expressions, literals, and operators .......
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Preface This preface introduces the documentation for the ARM Developer Suite (ADS) assemblers and assembly language. It contains the following sections: About this book on page vi Feedback on page ix. ARM DUI 0068B Copyright © 2000, 2001 ARM Limited. All rights reserved. v
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Preface About this book This book provides tutorial and reference information for the ADS assemblers (armasm, the free-standing assembler, and inline assemblers in the C and C++ compilers). It describes the command-line options to the assembler, the pseudo-instructions and ® directives available to assembly language programmers, and the ARM, Thumb , and Vector Floating-point (VFP) instruction sets. Intended audience This book is written for all developers who are producing applications usi
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Preface Typographical conventions The following typographical conventions are used in this book: monospace Denotes text that can be entered at the keyboard, such as commands, file and program names, and source code. monospace Denotes a permitted abbreviation for a command or option. The underlined text can be entered instead of the full command or option name. monospace italic Denotes arguments to commands and functions where the argument is to be replaced by a specific value. monospace bo
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Preface ADS Linker and Utilities Guide (ARM DUI 0151) CodeWarrior IDE Guide (ARM DUI 0065) AXD and armsd Debuggers Guide (ARM DUI 0066) ADS Debug Target Guide (ARM DUI 0058) ADS Developer Guide (ARM DUI 0056) ARM Applications Library Programmer’s Guide (ARM DUI 0081). The following additional documentation is provided with the ARM Developer Suite: ARM Architecture Reference Manual (ARM DDI 0100). This is supplied in DynaText format as part of the online books, and in PDF format i
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Preface Feedback ARM Limited welcomes feedback on both ADS and the documentation. Feedback on the ARM Developer Suite If you have any problems with ADS, please contact your supplier. To help them provide a rapid and useful response, please give: your name and company the serial number of the product details of the release you are using details of the platform you are running on, such as the hardware platform, operating system type and version a small standalone sample of code that r
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Preface x Copyright © 2000, 2001 ARM Limited. All rights reserved. ARM DUI 0068B
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Chapter 1 Introduction This chapter introduces the assemblers provided with ARM Developer Suite (ADS) version 1.2. It contains the following sections: About the ARM Developer Suite assemblers on page 1-2. ARM DUI 0068B Copyright © 2000, 2001 ARM Limited. All rights reserved. 1-1
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Introduction 1.1 About the ARM Developer Suite assemblers ARM Developer Suite (ADS) has: a freestanding assembler, armasm an optimizing inline assembler built into the C and C++ compilers. The language that these assemblers take as input is basically the same. However, there are limitations on what features of the language you can use in the inline assemblers. Refer to the Mixing C, C++, and Assembly Language chapter in ADS Developer Guide for further information on the inline assemblers
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Chapter 2 Writing ARM and Thumb Assembly Language This chapter provides an introduction to the general principles of writing ARM and Thumb assembly language. It contains the following sections: Introduction on page 2-2 Overview of the ARM architecture on page 2-3 Structure of assembly language modules on page 2-12 Using the C preprocessor on page 2-19 Conditional execution on page 2-20 Loading constants into registers on page 2-25 Loading addresses into registers on page 2-30
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Writing ARM and Thumb Assembly Language 2.1 Introduction This chapter gives a basic, practical understanding of how to write ARM and Thumb assembly language modules. It also gives information on the facilities provided by the ARM assembler (armasm). This chapter does not provide a detailed description of the ARM, Thumb, or VFP instruction sets. This information can be found in Chapter 4 ARM Instruction Reference, Chapter 5 Thumb Instruction Reference, and Chapter 6 Vector Floating-point Pr
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Writing ARM and Thumb Assembly Language 2.2 Overview of the ARM architecture This section gives a brief overview of the ARM architecture. ARM processors are typical of RISC processors in that they implement a load/store architecture. Only load and store instructions can access memory. Data processing instructions operate on register contents only. 2.2.1 Architecture versions The information and examples in this book assume that you are using a processor that implements ARM architecture v3 or
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Writing ARM and Thumb Assembly Language 2.2.3 Processor mode ARM processors support up to seven processor modes, depending on the architecture version. These are: User FIQ - Fast Interrupt Request IRQ - Interrupt Request Supervisor Abort Undefined System (ARM architecture v4 and above). All modes except User mode are referred to as privileged modes. Applications that require task protection usually execute in User mode. Some embedded applications might run entirely in Supervisor
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Writing ARM and Thumb Assembly Language In User mode, r14 is used as a link register (lr) to store the return address when a subroutine call is made. It can also be used as a general-purpose register if the return address is stored on the stack. In the exception handling modes, r14 holds the return address for the exception, or a subroutine return address if subroutine calls are executed within an exception. r14 can be used as a general-purpose register if the return address is stored on t
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Writing ARM and Thumb Assembly Language 2.2.5 ARM instruction set overview All ARM instructions are 32 bits long. Instructions are stored word-aligned, so the least significant two bits of instruction addresses are always zero in ARM state. Some instructions use the least significant bit to determine whether the code being branched to is Thumb code or ARM code. See Chapter 4 ARM Instruction Reference for detailed information on the syntax of the ARM instruction set. ARM instructions can be
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Writing ARM and Thumb Assembly Language Single register load and store instructions These instructions load or store the value of a single register from or to memory. They can load or store a 32-bit word or an 8-bit unsigned byte. In ARM architecture v4 and above they can also load or store a 16-bit unsigned halfword, or load and sign extend a 16-bit halfword or an 8-bit byte. Multiple register load and store instructions These instructions load or store any subset of the general-purpose reg
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Writing ARM and Thumb Assembly Language 2.2.6 ARM instruction capabilities The following general points apply to ARM instructions: Conditional execution Register access Access to the inline barrel shifter. Conditional execution Almost all ARM instructions can be executed conditionally on the value of the ALU status flags in the CPSR. You do not need to use branches to skip conditional instructions, although it can be better to do so when a series of instructions depend on the same cond
