ページ1に含まれる内容の要旨
Features
®
• High Performance, Low Power AVR 8-Bit Microcontroller
� Advanced RISC Architecture
– 131 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20 MHz
– On-chip 2-cycle Multiplier
� High Endurance Non-volatile Memory Segments
– 8K Bytes of In-System Self-Programmable Flash progam memory (ATmega88PA)
– 512 Bytes EEPROM (ATmega88PA)
8-bit
– 1K Bytes Internal SRAM (ATmega88PA)
– Writ
ページ2に含まれる内容の要旨
ATmega88PA 1. Pin Configurations Figure 1-1. Pinout ATmega88PA TQFP Top View PDIP (PCINT14/RESET) PC6 1 28 PC5 (ADC5/SCL/PCINT13) (PCINT16/RXD) PD0 2 27 PC4 (ADC4/SDA/PCINT12) (PCINT17/TXD) PD1 3 26 PC3 (ADC3/PCINT11) (PCINT19/OC2B/INT1) PD3 1 24 PC1 (ADC1/PCINT9) (PCINT18/INT0) PD2 4 25 PC2 (ADC2/PCINT10) (PCINT20/XCK/T0) PD4 2 23 PC0 (ADC0/PCINT8) (PCINT19/OC2B/INT1) PD3 5 24 PC1 (ADC1/PCINT9) 22 ADC7 GND 3 (PCINT20/XCK/T0) PD4 6 23 PC0 (ADC0/PCINT8) VCC 4 21 GND VCC 7 22 GND GND 5 20 AREF GND
ページ3に含まれる内容の要旨
ATmega88PA 1.1 Pin Descriptions 1.1.1 VCC Digital supply voltage. 1.1.2 GND Ground. 1.1.3 Port B (PB7:0) XTAL1/XTAL2/TOSC1/TOSC2 Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condi
ページ4に含まれる内容の要旨
ATmega88PA The various special features of Port D are elaborated in ”Alternate Functions of Port D” on page 80. 1.1.7 AV CC AV is the supply voltage pin for the A/D Converter, PC3:0, and ADC7:6. It should be externally CC connected to V , even if the ADC is not used. If the ADC is used, it should be connected to V CC CC through a low-pass filter. Note that PC6..4 use digital supply voltage, V . CC 1.1.8 AREF AREF is the analog reference pin for the A/D Converter. 1.1.9 ADC7:6 (TQFP and QFN/MLF P
ページ5に含まれる内容の要旨
ATmega88PA 2. Overview The ATmega88PA is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega88PA achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. 2.1 Block Diagram Figure 2-1. Block Diagram Watchdog Power debugWIRE Timer Supervision POR / BOD & Watchdog PROGRAM RESET LOGIC Oscillator Oscillator Flash SRAM Circuit
ページ6に含まれる内容の要旨
ATmega88PA architecture is more code efficient while achieving throughputs up to ten times faster than con- ventional CISC microcontrollers. The ATmega88PA provides the following features: 8K bytes of In-System Programmable Flash with Read-While-Write capabilities, 512 bytes EEPROM, 1K bytes SRAM, 23 general purpose I/O lines, 32 general purpose working registers, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable USART, a byte-oriented 2-wi
ページ7に含まれる内容の要旨
ATmega88PA 5. Register Summary Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page (0xFF) Reserved – – – – – – – – (0xFE) Reserved – – – – – – – – (0xFD) Reserved – – – – – – – – (0xFC) Reserved – – – – – – – – (0xFB) Reserved – – – – – – – – (0xFA) Reserved – – – – – – – – (0xF9) Reserved – – – – – – – – (0xF8) Reserved – – – – – – – – (0xF7) Reserved – – – – – – – – (0xF6) Reserved – – – – – – – – (0xF5) Reserved – – – – – – – – (0xF4) Reserved – – – – – – – – (0xF3) Reserved – –
ページ8に含まれる内容の要旨
ATmega88PA Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page (0xC1) UCSR0B RXCIE0 TXCIE0 UDRIE0 RXEN0 TXEN0 UCSZ02 RXB80 TXB80 188 (0xC0) UCSR0A RXC0 TXC0 UDRE0 FE0 DOR0 UPE0 U2X0 MPCM0 187 (0xBF) Reserved – – – – – – – – (0xBE) Reserved – – – – – – – – (0xBD) TWAMR TWAM6 TWAM5 TWAM4 TWAM3 TWAM2 TWAM1 TWAM0 –237 (0xBC) TWCR TWINT TWEA TWSTA TWSTO TWWC TWEN –TWIE 234 (0xBB) TWDR 2-wire Serial Interface Data Register 236 (0xBA) TWAR TWA6 TWA5 TWA4 TWA3 TWA2 TWA1 TWA0 TWGCE 237 (0xB
ページ9に含まれる内容の要旨
ATmega88PA Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page (0x7F) DIDR1 – – – – – –AIN1D AIN0D 242 (0x7E) DIDR0 – – ADC5D ADC4D ADC3D ADC2D ADC1D ADC0D 259 (0x7D) Reserved – – – – – – – – (0x7C) ADMUX REFS1 REFS0 ADLAR – MUX3 MUX2 MUX1 MUX0 255 (0x7B) ADCSRB –ACME – – – ADTS2 ADTS1 ADTS0 258 (0x7A) ADCSRA ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0 256 (0x79) ADCH ADC Data Register High byte 258 (0x78) ADCL ADC Data Register Low byte 258 (0x77) Reserved – – – – – – – – (0x76) R
ページ10に含まれる内容の要旨
ATmega88PA Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page 0x1D (0x3D) EIMSK – – – – – –INT1 INT0 64 0x1C (0x3C) EIFR – – – – – – INTF1 INTF0 64 0x1B (0x3B) PCIFR – – – – – PCIF2 PCIF1 PCIF0 0x1A (0x3A) Reserved – – – – – – – – 0x19 (0x39) Reserved – – – – – – – – 0x18 (0x38) Reserved – – – – – – – – 0x17 (0x37) TIFR2 – – – – – OCF2B OCF2A TOV2 155 0x16 (0x36) TIFR1 – –ICF1 – – OCF1B OCF1A TOV1 132 0x15 (0x35) TIFR0 – – – – – OCF0B OCF0A TOV0 0x14 (0x34) Reserved – – – – – – –
ページ11に含まれる内容の要旨
ATmega88PA Mnemonics Operands Description Operation Flags #Clocks NEG Rd Two’s Complement Rd ← 0x00 − Rd Z,C,N,V,H 1 SBR Rd,K Set Bit(s) in Register Rd ← Rd v K Z,N,V 1 CBR Rd,K Clear Bit(s) in Register Rd ← Rd • (0xFF - K) Z,N,V 1 INC Rd Increment Rd ← Rd + 1 Z,N,V 1 DEC Rd Decrement Rd ← Rd − 1 Z,N,V 1 TST Rd Test for Zero or Minus Rd ← Rd • Rd Z,N,V 1 CLR Rd Clear Register Rd ← Rd ⊕ Rd Z,N,V 1 SER Rd Set Register Rd ← 0xFF None 1 MUL Rd, Rr Multiply Unsigned R1:R0 ← Rd x Rr Z,C 2 MULS Rd, Rr
ページ12に含まれる内容の要旨
ATmega88PA Mnemonics Operands Description Operation Flags #Clocks SEZ Set Zero Flag Z ← 1Z 1 CLZ Clear Zero Flag Z ← 0 Z 1 SEI Global Interrupt Enable I ← 1I 1 CLI Global Interrupt Disable I ← 0 I 1 SES Set Signed Test Flag S ← 1S 1 CLS Clear Signed Test Flag S ← 0 S 1 SEV Set Twos Complement Overflow. V ← 1V 1 CLV Clear Twos Complement Overflow V ← 0 V 1 SET Set T in SREG T ← 1T 1 CLT Clear T in SREG T ← 0 T 1 SEH Set Half Carry Flag in SREG H ← 1H 1 CLH Clear Half Carry Flag in SREG H ← 0 H 1
ページ13に含まれる内容の要旨
ATmega88PA 7. Ordering Information 7.1 ATmega88PA (3) (2) (1) Speed (MHz) Power Supply Ordering Code Package Operational Range ATmega88PA-AU 32A (4) ATmega88PA-MMH 28M1 Industrial 20 1.8 - 5.5 ATmega88PA-MU 32M1-A (-40°C to 85°C) ATmega88PA-PU 28P3 Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Subst
ページ14に含まれる内容の要旨
ATmega88PA 8. Packaging Information 8.1 32A PIN 1 B PIN 1 IDENTIFIER E1 E e D1 D C 0˚~7˚ A1 A2 A L COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A – – 1.20 A1 0.05 – 0.15 A2 0.95 1.00 1.05 D 8.75 9.00 9.25 D1 6.90 7.00 7.10 Note 2 E 8.75 9.00 9.25 Notes: 1. This package conforms to JEDEC reference MS-026, Variation ABA. E1 6.90 7.00 7.10 Note 2 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 ar
ページ15に含まれる内容の要旨
ATmega88PA 8.2 28M1 D C 1 2 Pin 1 ID 3 E SIDE VIEW A1 TOP VIEW A y K D2 0.45 COMMON DIMENSIONS 1 (Unit of Measure = mm) 2 R 0.20 MIN MAX SYMBOL NOM NOTE 3 A 0.80 0.90 1.00 E2 A1 0.00 0.02 0.05 b 0.17 0.22 0.27 b C 0.20 REF D 3.95 4.00 4.05 D2 2.35 2.40 2.45 L E 3.95 4.00 4.05 e E2 2.35 2.40 2.45 0.4 Ref e 0.45 BOTTOM VIEW (4x) L 0.35 0.40 0.45 y 0.00 – 0.08 K 0.20 – – Note: The terminal #1 ID is a Laser-marked Feature. 10/24/08 TITLE GPC DRAWING NO. REV. 28M1, 28-pad, 4 x 4
ページ16に含まれる内容の要旨
ATmega88PA 8.3 32M1-A D D1 1 0 2 Pin 1 ID 3 E1 E SIDE VIEW TOP VIEW A3 A2 A1 A K 0.08 COMMON DIMENSIONS C (Unit of Measure = mm) P D2 MIN NOM MAX NOTE SYMBOL A 0.80 0.90 1.00 A1 – 0.02 0.05 1 P 2 A2 – 0.65 1.00 Pin #1 Notch (0.20 R) 3 A3 0.20 REF E2 b 0.18 0.23 0.30 D 4.90 5.00 5.10 K D1 4.70 4.75 4.80 D2 2.95 3.10 3.25 E 4.90 5.00 5.10 b e L E1 4.70 4.75 4.80 E2 2.95 3.10 3.25 BOTTOM VIEW e 0.50 BSC L 0.30 0.40 0.50 P – – 0.60 o – – 12 0 Note: JEDEC Standard MO-220, Fig.
ページ17に含まれる内容の要旨
ATmega88PA 8.4 28P3 D PIN 1 E1 A SEATING PLANE A1 L B2 (4 PLACES) B B1 e E COMMON DIMENSIONS (Unit of Measure = mm) 0º ~ 15º REF C SYMBOL MIN NOM MAX NOTE A – – 4.5724 eB A1 0.508 – – D 34.544 – 34.798 Note 1 E 7.620 – 8.255 E1 7.112 – 7.493 Note 1 B 0.381 – 0.533 B1 1.143 – 1.397 Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). B2 0.762 – 1.143 L 3.175 – 3.429 C 0.203 – 0.356 eB – – 10.160 e
ページ18に含まれる内容の要旨
ATmega88PA 9. Errata 9.1 Errata ATmega88PA The revision letter in this section refers to the revision of the ATmega88PA device. 9.1.1 Rev. F No known errata. 18 8161AS–AVR–11/08
ページ19に含まれる内容の要旨
ATmega88PA 10. Datasheet Revision History Please note that the referring page numbers in this section are referred to this document. The referring revision in this section are referring to the document revision. 10.1 Rev. 8161A – 11/08 1. Initial revision (Based on the ATmega48P/88P/168P/328P datasheet 8025F-AVR-08/08). 2. Changes done compared to ATmega48P/88P/168P/328P datasheet 8025F-AVR-08/08: – Updated ”DC Characteristics” on page 295 with new typical values for I . CC – Updated ”Speed Grad
ページ20に含まれる内容の要旨
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