Summary of the content on the page No. 1
®
MoBL CY62148EV30
4-Mbit (512K x 8) Static RAM
Features Functional Description
[2]
■ Very high speed: 45 ns The CY62148EV30 is a high performance CMOS static RAM
organized as 512K words by 8 bits. This device features
❐ Wide voltage range: 2.20V to 3.60V
advanced circuit design to provide ultra low active current. This
®
■ Temperature ranges
is ideal for providing More Battery Life™ (MoBL ) in portable
❐ Industrial: –40°C to +85°C
applications such as cellular telephones. The device also has a
Summary of the content on the page No. 2
® MoBL CY62148EV30 [1, 3] Pin Configuration 36-Ball VFBGA Pinout 32-Pin SOIC/TSOP II Pinout Top View Top View V A 1 CC 17 32 A A 16 2 31 15 A A A A A NC 3 6 8 A 0 1 A A 3 14 30 18 A 12 4 29 WE A A A 7 5 28 IO WE 13 A A IO B 4 4 7 0 2 A A 6 6 27 8 A A 5 7 26 9 NC C A A IO A IO 4 8 25 11 5 1 5 A 3 9 24 OE A 2 10 A 23 10 V V cc D A SS 1 11 22 CE A 0 12 21 IO 7 IO 13 0 20 IO V 6 V E ss CC IO 1 IO 14 19 5 IO 2 15 18 IO 4 V 16 17 SS IO F IO A A 3 IO 18 17 6 2 CE A G IO OE A IO 16 7 15 3 A A A A A A
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® MoBL CY62148EV30 [5, 6] DC Input Voltage .....................–0.3V to V + 0.3V Maximum Ratings CC(max) Output Current into Outputs (LOW)............................. 20 mA Exceeding maximum ratings may impair the useful life of the Static Discharge Voltage.......................................... > 2001V device. These user guidelines are not tested. (MIL-STD-883, Method 3015) Storage Temperature.................................. –65°C to +150°C Latch up Current...............................
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® MoBL CY62148EV30 [10] Capacitance (For All packages) Parameter Description Test Conditions Max Unit C Input Capacitance T = 25°C, f = 1 MHz, 10 pF IN A V = V CC CC(typ) C Output Capacitance 10 pF OUT [10] Thermal Resistance VFBGA TSOP II SOIC Parameter Description Test Conditions Unit Package Package Package Θ Thermal Resistance Still Air, soldered on a 3 x 4.5 inch, 72 75.13 55 °C/W JA (Junction to Ambient) two-layer printed circuit board Θ Thermal Resistance 8.86 8.95 22 °C/W JC (Junction
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® MoBL CY62148EV30 Switching Characteristics [12] (Over the Operating Range) [1] - 45 (Ind’l/Auto-A) - 55 Parameter Description Unit Min Max Min Max Read Cycle t Read Cycle Time 45 55 ns RC t Address to Data Valid 45 55 ns AA t Data Hold from Address Change 10 10 ns OHA t CE LOW to Data Valid 45 55 ns ACE t OE LOW to Data Valid 22 25 ns DOE [13] t OE LOW to Low Z 55 ns LZOE [13, 14] t OE HIGH to High Z 18 20 ns HZOE [13] t CE LOW to Low Z 10 10 ns LZCE [13, 14] t CE HIGH to High Z 18 20 ns HZ
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® MoBL CY62148EV30 Switching Waveforms [16, 17] Figure 1. Read Cycle No. 1 (Address Transition Controlled) tRC RC ADDRESS t AA t OHA DATA OUT PREVIOUS DATA VALID DATA VALID [17, 18] Figure 2. Read Cycle No. 2 (OE Controlled) ADDRESS t RC CE t ACE OE t HZOE t DOE t HZCE t LZOE HIGH IMPEDANCE HIGH IMPEDANCE DATA VALID DATA OUT t LZCE t PD t I V PU CC CC 50% SUPPLY 50% CURRENT I SB [19, 20] Figure 3. Write Cycle No. 1 (WE Controlled, OE HIGH During Write) t WC ADDRESS t SCE CE t t AW HA t t
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® MoBL CY62148EV30 Switching Waveforms (continued) [19, 20] Figure 4. Write Cycle No. 2 (CE Controlled) t WC ADDRESS t SCE CE t SA t t AW HA t PWE WE t t SD HD DATA IO DATA VALID [20] Figure 5. Write Cycle No. 3 (WE Controlled, OE LOW) t WC ADDRESS t SCE CE t t AW HA t t SA PWE WE t t SD HD 21 NOTE DATA VALID DATA IO t t LZWE HZWE Truth Table CE WE OE Inputs/Outputs Mode Power H X X High Z Deselect/Power down Standby (I ) SB L H L Data Out Read Active (I ) CC L H H High Z Output Disabled Ac
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® MoBL CY62148EV30 Ordering Information Speed Package Operating Ordering Code Package Type (ns) Diagram Range 45 CY62148EV30LL-45BVXI 51-85149 36-ball Very Fine Pitch Ball Grid Array (Pb-free) Industrial CY62148EV30LL-45ZSXI 51-85095 32-pin Thin Small Outline Package II (Pb-free) CY62148EV30LL-45ZSXA 51-85095 32-pin Thin Small Outline Package II (Pb-free) Automotive-A 55 CY62148EV30LL-55SXI 51-85081 32-pin Small Outline Integrated Circuit (Pb-free) Industrial Contact your local Cypress sales rep
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® MoBL CY62148EV30 Package Diagrams (continued) Figure 7. 32-pin TSOP II (51-85095) 51-85095-** Document #: 38-05576 Rev. *G Page 9 of 12 [+] Feedback
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® MoBL CY62148EV30 Package Diagrams (continued) Figure 8. 32-pin (450 MIL) Molded SOIC (51-85081) 16 1 0.546[13.868] 0.566[14.376] 0.440[11.176] 0.450[11.430] 17 32 0.793[20.142] 0.817[20.751] 0.006[0.152] 0.012[0.304] 0.101[2.565] 0.118[2.997] 0.111[2.819] MAX. 0.004[0.102] 0.047[1.193] 0.004[0.102] 0.063[1.600] 0.050[1.270] 0.023[0.584] MIN. BSC. 0.039[0.990] 0.014[0.355] 0.020[0.508] SEATING PLANE 51-85081-*B Document #: 38-05576 Rev. *G Page 10 of 12 [+] Feedback
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® MoBL CY62148EV30 Document History Page ® Document Title: CY62148EV30 MoBL 4-Mbit (512K x 8) Static RAM Document Number: 38-05576 Revision ECN Submission Orig. of Description of Change Date Change ** 223225 See ECN AJU New data sheet *A 247373 See ECN SYT Changed from Advance Information to Preliminary Moved Product Portfolio to Page 2 Changed V stabilization time in footnote #7 from 100 μs to 200 μs CC Changed I from 2.0 μA to 2.5 μA CCDR Changed typo in Data Retention Characteristics (t ) fro
Summary of the content on the page No. 12
® MoBL CY62148EV30 ® Document Title: CY62148EV30 MoBL 4-Mbit (512K x 8) Static RAM Document Number: 38-05576 Revision ECN Submission Orig. of Description of Change Date Change *F 987940 See ECN VKN Changed V spec from 0.4V to 0.2V for SOIC package at I = 0.1 mA OL OL Changed V spec from 0.6V to 0.4V for SOIC package at V = 2.2V to 2.7V IL CC Updated footnote 8 Made footnote 9 applicable for both I and I SB2 CCDR *G 2548575 08/05/08 NXR Added Auto-A information. Sales, Solutions, and Legal Inform
