Summary of the content on the page No. 1
CY7C6431x
CY7C64345, CY7C6435x
enCoRe™ V Full Speed USB Controller
Features
■ Powerful Harvard Architecture Processor ■ Programmable Pin Configurations
❐ M8C processor speeds running up to 24 MHz ❐ 25 mA sink current on all GPIO
❐ Low power at high processing speeds ❐ Pull Up, High Z, Open Drain, CMOS drive modes on all GPIO
❐ Interrupt controller ❐ Configurable inputs on all GPIO
❐ 3.0V to 5.5V operating voltage without USB ❐ Low dropout voltage regulator for Port 1 pins. Programmable
to outp
Summary of the content on the page No. 2
CY7C6431x CY7C64345, CY7C6435x need for CPU intervention until a packet addressed to the target Functional Overview device is received. The enCoRe V family of devices are designed to replace multiple ■ Low Voltage Detection (LVD) interrupts can signal the appli- traditional full speed USB microcontroller system components cation of falling voltage levels, while the advanced POR (power with one, low cost single-chip programmable component. on reset) circuit eliminates the need for a system supe
Summary of the content on the page No. 3
CY7C6431x CY7C64345, CY7C6435x Development Tools ® PSoC Designer™ is a Microsoft Windows-based, integrated Assemblers. The assemblers allow assembly code to be development environment for the enCoRe and PSoC devices. merged seamlessly with C code. Link libraries automatically use The PSoC Designer IDE and application runs on Windows XP absolute addressing or are compiled in relative mode, and linked and Windows Vista. with other software modules to get absolute addressing. This system provides
Summary of the content on the page No. 4
CY7C6431x CY7C64345, CY7C6435x Designing with PSoC Designer The development process for the enCoRe V device differs from Generate, Verify, and Debug that of a traditional fixed function microprocessor. Powerful When you are ready to test the hardware configuration or move PSoC Designer tools get the core of your design up and running on to developing code for the project, you perform the “Generate in minutes instead of hours. Configuration Files” step. This causes PSoC Designer to The developmen
Summary of the content on the page No. 5
CY7C6431x CY7C64345, CY7C6435x Document Conventions Acronyms Used Units of Measure The following table lists the acronyms that are used in this A units of measure table is located in the Electrical Specifications document. section. Table 7 on page 13 lists all the abbreviations used to measure the enCoRe V devices. Acronym Description Numeric Naming API application programming interface Hexadecimal numbers are represented with all letters in CPU central processing unit uppercase with an appended
Summary of the content on the page No. 6
CY7C6431x CY7C64345, CY7C6435x Pin Configuration The enCoRe V USB device is available in a variety of packages which are listed and illustrated in the subsequent tables. 16-Pin Part Pinout Figure 1. CY7C64315/CY7C64316 16-Pin enCoRe V Device P2[3] P0[4] 1 12 P1[7] 2 QFN XRES 11 (Top View) P1[5] 3 10 P1[4] P1[1] 4 9 P1[0] Table 1. 16-Pin Part Pinout (QFN) Pin No. Type Name Description 1 I/O P2[3] Digital I/O, Crystal Input (Xin) 2 IOHR P1[7] Digital I/O, SPI SS, I2C SCL 3 IOHR P1[5] Digital I/O
Summary of the content on the page No. 7
CY7C6431x CY7C64345, CY7C6435x 32-Pin Part Pinout Figure 2. CY7C64343/CY7C64345 32-Pin enCoRe V USB Device P0[1] 1 24 P0[0] 2 23 P2[6] P2[5] P2[3] 3 22 P2[4] P2[1] 4 21 P2[2] QFN P1[7] 5 20 P2[0] (Top View) P1[5] 6 19 P3[2] P1[3] 7 18 P3[0] P1[1] 8 17 XRES Table 2. 32-Pin Part Pinout (QFN) Pin No. Type Name Description 1 IOH P0[1] Digital I/O 2 I/O P2[5] Digital I/O, Crystal Output (Xout) 3 I/O P2[3] Digital I/O, Crystal Input (Xin) 4 I/O P2[1] Digital I/O 5 IOHR P1[7] Digital I/O, I2C SCL, SP
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CY7C6431x CY7C64345, CY7C6435x 48-Pin Part Pinout Figure 3. CY7C64355/CY7C64356 48-Pin enCoRe V USB Device P2[6] NC 1 36 P2[7] P2[4] 2 35 P2[5] P2[2] 34 3 P2[3] P2[0] 4 33 P2[1] P4[2] 32 5 P4[3] 31 P4[0] 6 QFN P4[1] P3[6] 7 (Top View) 30 P3[7] P3[4] 29 8 P3[5] 28 P3[2] 9 P3[3] 27 P3[0] 10 XRES P3[1] 26 11 P1[6] P1[7] 25 12 Table 3. 48-Pin Part Pinout (QFN) Pin No. Type Pin Name Description 1NC NC No connection 2 I/O P2[7] Digital I/O 3 I/O P2[5] Digital I/O, Crystal Out (Xout) 4 I/O P2[3] Digit
Summary of the content on the page No. 9
CY7C6431x CY7C64345, CY7C6435x Table 3. 48-Pin Part Pinout (QFN) (continued) Pin No. Type Pin Name Description 26 XRES Ext Reset Active high external reset with internal pull down 27 I/O P3[0] Digital I/O 28 I/O P3[2] Digital I/O 29 I/O P3[4] Digital I/O 30 I/O P3[6] Digital I/O 31 I/O P4[0] Digital I/O 32 I/O P4[2] Digital I/O 33 I/O P2[0] Digital I/O 34 I/O P2[2] Digital I/O 35 I/O P2[4] Digital I/O 36 I/O P2[6] Digital I/O 37 IOH P0[0] Digital I/O 38 IOH P0[2] Digital I/O 39 IOH P0[4] Digital
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CY7C6431x CY7C64345, CY7C6435x Register Reference The section discusses the registers of the enCoRe V device. It lists all the registers in mapping tables, in address order. Register Conventions Register Mapping Tables The register conventions specific to this section are listed in the The enCoRe V device has a total register address space of 512 following table. bytes. The register space is also referred to as IO space and is broken into two parts: Bank 0 (user space) and Bank 1 (configu- Tabl
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CY7C6431x CY7C64345, CY7C6435x Table 5. Register Map Bank 0 Table: User Space Name Addr (0,Hex) Access Name Addr (0,Hex) Access Name Addr (0,Hex) Access Name Addr (0,Hex) Access PRT0DR 00 RW EP1_CNT0 40 # 80 C0 PRT0IE 01 RW EP1_CNT1 41 RW 81 C1 02 EP2_CNT0 42 # 82 C2 03 EP2_CNT1 43 RW 83 C3 PRT1DR 04 RW EP3_CNT0 44 # 84 C4 PRT1IE 05 RW EP3_CNT1 45 RW 85 C5 06 EP4_CNT0 46 # 86 C6 07 EP4_CNT1 47 RW 87 C7 PRT2DR 08 RW EP5_CNT0 48 # 88 I2C_XCFG C8 RW PRT2IE 09 RW EP5_CNT1 49 RW 89 I2C_XSTAT C9 R 0
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CY7C6431x CY7C64345, CY7C6435x Table 6. Register Map Bank 1 Table: Configuration Space Name Addr (1,Hex) Access Name Addr (1,Hex) Access Name Addr (1,Hex) Access Name Addr (1,Hex) Access PRT0DM0 00 RW PMA4_RA 40 RW 80 C0 PRT0DM1 01 RW PMA5_RA 41 RW 81 C1 02 PMA6_RA 42 RW 82 C2 03 PMA7_RA 43 RW 83 C3 PRT1DM0 04 RW PMA8_WA 44 RW 84 C4 PRT1DM1 05 RW PMA9_WA 45 RW 85 C5 06 PMA10_WA 46 RW 86 C6 07 PMA11_WA 47 RW 87 C7 PRT2DM0 08 RW PMA12_WA 48 RW 88 C8 PRT2DM1 09 RW PMA13_WA 49 RW 89 C9 0A PMA14_WA
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V id al Operating Region CY7C6431x CY7C64345, CY7C6435x Electrical Specifications This section presents the DC and AC electrical specifications of the enCoRe V USB devices. For the most up to date electrical specifications, verify that you have the most recent data sheet available by visiting the company web site at http://www.cypress.com Figure 4. Voltage versus CPU Frequency Figure 5. IMO Frequency Trim Options 5.5V 5.5V SLIMO SLIMO SLIMO Mode Mode Mode = 01 = 00 = 10 3.0V 3.0V 750 kHz 3 MHz 2
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CY7C6431x CY7C64345, CY7C6435x ADC Electrical Specifications Table 8. ADC Electrical Specifications Symbol Description Min Typ Max Units Conditions Input Input Voltage Range Vss 1.3 V This gives 72% of maximum code Input Capacitance 5 pF Resolution 8 Bits 8-Bit Sample Rate 23.4375 ksps Data Clock set to 6 MHz. Sample Rate = 0.001/(2^Resolution/Data clock) DC Accuracy DNL -1 +2 LSb For any configuration INL -2 +2 LSb For any configuration
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CY7C6431x CY7C64345, CY7C6435x Electrical Characteristics Absolute Maximum Ratings Operating Conditions (3) o o o o o Storage Temperature (T ) -55 C to 125 C (Typical +25 C) Ambient Temperature (T ).................................. 0 C to 70 C STG A (6) o o Supply Voltage Relative to Vss (Vdd)............. -0.5V to +6.0V Operational Die Temperature (T ) ................... 0 C to 85 C J DC Input Voltage (V )....................Vss - 0.5V to Vdd + 0.5V IO DC Voltage Applied to Tri-state (V )Vss
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CY7C6431x CY7C64345, CY7C6435x Table 10.DC Characteristics – USB Interface Symbol Description Conditions Min Typ Max Units Rusbi USB D+ Pull Up Resistance With idle bus 0.900 - 1.575 k Ω Rusba USB D+ Pull Up Resistance While receiving traffic 1.425 - 3.090 k Ω Vohusb Static Output High 2.8 - 3.6 V Volusb Static Output Low -0.3 V Vdi Differential Input Sensitivity 0.2 - V Vcm Differential Input Common Mode Range 0.8 - 2.5 V Vse Single Ended Receiver Threshold 0.8 - 2.0 V Cin Transceiver Capacitan
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CY7C6431x CY7C64345, CY7C6435x Table 11. 3.0V and 5.5V DC GPIO Specifications Symbol Description Conditions Min Typ Max Units V Low Output Voltage IOL = 20 mA, Vdd > 3.3V, maximum of 60 mA –– 0.75 V OL sink current on even port pins (for example, P0[2] and P1[4]) and 60 mA sink current on odd port pins (for example, P0[3] and P1[5]). V Input Low Voltage Vdd = 3.3 to 5.5. – – 0.8 V IL V Input High Voltage Vdd = 3.3 to 5.5. 2.0 – V IH V Input Hysteresis Voltage 50 60 200 mV H I Input Leakage (Ab
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CY7C6431x CY7C64345, CY7C6435x DC Programming Specifications Table 13 lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges. Table 13. DC Programming Specifications Symbol Description Min Typ Max Units Vdd Supply Voltage for Flash Write Operations 3.0 – – V IWRITE I Supply Current During Programming or Verify – 5 25 mA DDP V Input Low Voltage During Programming or Verify – – V V ILP IL V Input High Voltage During Programming or Verify V – – V IHP IH I
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CY7C6431x CY7C64345, CY7C6435x Table 15.AC Characteristics – USB Data Timings Symbol Description Conditions Min Typ Max Units Tdrate Full speed data rate Average bit rate 9 12 15 MHz Tdjr1 Receiver data jitter tolerance To next transition -18.5 – 18.5 ns Tdjr2 Receiver data jitter tolerance To pair transition -9 – 9 ns Tudj1 Driver differential jitter To next transition -3.5 – 3.5 ns Tudj2 Driver differential jitter To pair transition -4.0 – 4.0 ns Tfdeop Source jitter for differential transiti
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CY7C6431x CY7C64345, CY7C6435x AC General Purpose I/O Specifications Table 17 lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges. Table 17. AC GPIO Specifications Symbol Description Conditions Min Typ Max Units F GPIO Operating Frequency Normal Strong Mode, Ports 0, 1 0 – 12 MHz GPIO TRise23 Rise Time, Strong Mode Vdd = 3.3 to 5.5V, 10% - 90% 15 – 80 ns Ports 2, 3 TRise01 Rise Time, Strong Mode Vdd = 3.3 to 5.5V, 10% - 90% 10 – 50 ns Ports 0, 1 TFa
