Cypress Perform STK16C88-3 user manual

User manual for the device Cypress Perform STK16C88-3

Device: Cypress Perform STK16C88-3
Category: Computer Hardware
Manufacturer: Cypress
Size: 0.46 MB
Added : 10/17/2014
Number of pages: 14
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Abstracts of contents
Summary of the content on the page No. 1

STK16C88-3
256 Kbit (32K x 8) AutoStore+ nvSRAM
Features Functional Description
■ Fast 35ns Read access and R/W cycle time The Cypress STK16C88-3 is a 256Kb fast static RAM with a
nonvolatile element in each memory cell. The embedded
■ Directly replaces battery-backed SRAM modules such as ™
nonvolatile elements incorporate QuantumTrap technology
Dallas/Maxim DS1230W
producing the world’s most reliable nonvolatile memory. The
SRAM provides unlimited read and write cycles, while
■ Automatic nonvol

Summary of the content on the page No. 2

STK16C88-3 Pin Configurations Figure 1. Pin Diagram - 28-Pin PDIP Table 1. Pin Definitions - 28-Pin PDIP Pin Name Alt IO Type Description A –A Input Address Inputs. Used to select one of the 32,768 bytes of the nvSRAM. 0 14 DQ -DQ Input or Bidirectional Data IO lines. Used as input or output lines depending on operation. 0 7 Output Input Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the WE W IO pins is

Summary of the content on the page No. 3

STK16C88-3 If the STK16C88-3 is in a WRITE state at the end of power up Device Operation RECALL, the SRAM data is corrupted. To help avoid this situation, a 10 Kohm resistor is connected either between WE The AutoStore+ STK16C88-3 is a fast 32K x 8 SRAM that does and system V or between CE and system V . not lose its data on power down. The data is preserved in integral CC CC QuantumTrap non-volatile storage elements when power is lost. Software STORE Automatic STORE on power down and automatic

Summary of the content on the page No. 4

STK16C88-3 Figure 3. Current Versus Cycle Time (WRITE) Hardware Protect The STK16C88-3 offers hardware protection against inadvertent STORE operation and SRAM WRITEs during low voltage conditions. When V

Summary of the content on the page No. 5

STK16C88-3 Table 2. Software STORE/RECALL Mode Selection A – A Mode IO Notes CE WE 13 0 [1, 2] L H 0x0E38 Read SRAM Output Data 0x31C7 Read SRAM Output Data 0x03E0 Read SRAM Output Data 0x3C1F Read SRAM Output Data 0x303F Read SRAM Output Data 0x0FC0 Nonvolatile STORE Output Data [1, 2] L H 0x0E38 Read SRAM Output Data 0x31C7 Read SRAM Output Data 0x03E0 Read SRAM Output Data 0x3C1F Read SRAM Output Data 0x303F Read SRAM Output Data 0x0C63 Nonvolatile RECALL Output Data Notes 1. The six consec

Summary of the content on the page No. 6

STK16C88-3 Voltage on DQ ...................................–0.5V to Vcc + 0.5V Maximum Ratings 0-7 Power Dissipation ......................................................... 1.0W Exceeding maximum ratings may shorten the useful life of the DC output Current (1 output at a time, 1s duration) .... 15 mA device. These user guidelines are not tested. Operating Range Storage Temperature .................................–65°C to +150°C Range Ambient Temperature V Temperature under bias .............

Summary of the content on the page No. 7

STK16C88-3 Capacitance [4] In the following table, the capacitance parameters are listed. Parameter Description Test Conditions Max Unit C Input Capacitance T = 25°C, f = 1 MHz, 5pF IN A V = 0 to 3.0 V CC C Output Capacitance 7 pF OUT Thermal Resistance [4] In the following table, the thermal resistance parameters are listed. Parameter Description Test Conditions 28-PDIP Unit Θ Thermal Resistance Test conditions follow standard test methods and proce- TBD °C/W JA (Junction to Ambient) dures for

Summary of the content on the page No. 8

STK16C88-3 AC Switching Characteristics SRAM Read Cycle Parameter 35 ns Description Unit Cypress Alt Min Max Parameter t t Chip Enable Access Time 35 ns ACE ELQV [5] t t t Read Cycle Time 35 ns RC AVAV, ELEH [6] t t Address Access Time 35 ns AA AVQV t t Output Enable to Data Valid 15 ns DOE GLQV [6] t t Output Hold After Address Change 5 ns OHA AXQX [7] t t Chip Enable to Output Active 5 ns LZCE ELQX [7] t t Chip Disable to Output Inactive 13 ns HZCE EHQZ [7] t t Output Enable to Output Active

Summary of the content on the page No. 9

STK16C88-3 Table 3. SRAM Write Cycle Parameter 35 ns Description Unit Cypress Alt Min Max Parameter t t Write Cycle Time 35 ns WC AVAV t t t Write Pulse Width 25 ns PWE WLWH, WLEH t t t Chip Enable To End of Write 25 ns SCE ELWH, ELEH t t t Data Setup to End of Write 12 ns SD DVWH, DVEH t t t Data Hold After End of Write 0 ns HD WHDX, EHDX t t t Address Setup to End of Write 25 ns AW AVWH, AVEH t t t Address Setup to Start of Write 0 ns SA AVWL, AVEL t t t Address Hold After End of Write 0 ns

Summary of the content on the page No. 10

STK16C88-3 AutoStorePlus or Power Up RECALL STK16C88-3 Parameter Alt Description Unit Min Max [10] t t Power up RECALL Duration 550 μs HRECALL RESTORE t t STORE Cycle Duration 10 ms STORE HLHZ [4, 6] t Power-down AutoStore Slew Time to Ground 500 ns stg V Low Voltage Reset Level 2.4 V RESET V Low Voltage Trigger Level 2.7 2.95 V SWITCH Switching Waveforms Figure 9. AutoStorePlus/Power Up RECALL Notes 10. t starts from the time V rises above V . HRECALL CC S

Summary of the content on the page No. 11

STK16C88-3 Software Controlled STORE/RECALL Cycle [11, 12] The software controlled STORE/RECALL cycle follows. 35 ns Parameter Alt Description Unit Min Max t t STORE/RECALL Initiation Cycle Time 35 ns RC AVAV [11] t t Address Setup Time 0 ns SA AVEL [11] t t Clock Pulse Width 25 ns CW ELEH [7, 11] t t Address Hold Time 20 ns HACE ELAX RECALL Duration 20 μs t RECALL Switching Waveforms [12] Figure 10. CE Controlled Software STORE/RECALL Cycle t t RC RC ADDRESS # 1 ADDRESS # 6 ADDRESS t t SA S

Summary of the content on the page No. 12

STK16C88-3 Part Numbering Nomenclature STK16C88 - 3W F 35 I Temperature Range: Blank - Commercial (0 to 70°C) I - Industrial (-40 to 85°C) Speed: 35 - 35 ns Lead Finish F = 100% Sn (Matte Tin) Package: W = Plastic 28-pin 600 mil DIP Ordering Information Speed Operating Package Diagram Package Type (ns) Ordering Code Range 35 STK16C88-3WF35 51-85017 28-pin PDIP Commercial STK16C88-3WF35I Industrial All parts are Pb-free. The above table contains Final information. Please contact your local Cypr

Summary of the content on the page No. 13

STK16C88-3 Package Diagrams Figure 11. 28-Pin (600 Mil) PDIP (51-85017) 51-85017 *B Document Number: 001-50594 Rev. ** Page 13 of 14 [+] Feedback

Summary of the content on the page No. 14

STK16C88-3 Document History Page Document Title: STK16C88-3 256 Kbit (32K x 8) AutoStore+ nvSRAM Document Number: 001-50594 Orig. of Submission Rev. ECN No. Description of Change Change Date ** 2625096 GVCH/PYRS 12/19/08 New data sheet Sales, Solutions and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Prod


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