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User’s Guide
Publication number 16500-97022
August 1997
For Safety information, Warranties, and Regulatory
information, see the pages behind the Index
© Copyright Hewlett-Packard Company 1987, 1990, 1993, 1994, 1996, 1997
All Rights Reserved
HP 16500C /16501A Logic
Analysis System
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HP 16500C—At a Glance A system of measurement modules Install measurement modules in any slot The HP 16500C is the mainframe of the Hewlett-Packard Logic Analysis Single card analyzers, oscilloscopes, System. It offers a modular structure for and other options can go in any slot of plug-in cards with a wide range of state, the HP 16500C or HP 16501A. You should timing, oscilloscope, and pattern generally begin installing cards starting generator capabilities. with the bottom-most slot and workin
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HP 16500C HP 16501A iii
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iv
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In This Book 1 Triggering 2 Intermodule Measurements 3 File Management This User’s Guide shows you how to use the HP 16500C Logic Analysis System in your everyday debugging work. 4 Concepts Chapter 1, “Triggering,” shows you how to set up the analyzer to trigger on the 5 Solving Problems various kinds of events present in your system. Advanced triggering capability allows you to look at only the program 6 Application Notes states of interest when you are solving a particular problem. Chapter 2,
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about specific application problems and how to solve them using an HP logic analyzer. See Also For general information on setup and operation of the HP 16500C, see the HP 16500C /16501A Logic Analysis System User’s Reference. For information on programming the HP 16500C using a computer controller such as a workstation or personal computer, see the HP 16500C/16501A Logic Analysis System Programmer’s Guide. The Programmer’s Guide is available from your HP Sales Office. For information on logic a
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Contents 1 Triggering To store and time the execution of a subroutine 1–3 To trigger on the nth iteration of a loop 1–5 To trigger on the nth recursive call of a recursive function 1–6 To trigger on entry to a function 1–8 To capture a write of known bad data to a particular variable 1–10 To trigger on a loop that occasionally runs too long 1–11 To verify that all stacks and registers are restored correctly before exiting a subroutine 1–12 To trigger after all status bus lines finish transitio
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Contents To capture state flow showing how your target system processes an interrupt 2–16 To test a circuit using stimulus-response 2–17 To use a state analyzer to trigger timing analysis of a count-down on a set of data lines 2–18 To monitor the activity of two coprocessors in a target system 2–19 Special displays 2–21 To interleave trace lists 2–22 To view trace lists and waveforms together on the same display 2–24 Skew Adjustment 2–26 To adjust for minimum skew between two modules involved
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Contents 4 Concepts The Trigger Sequencer 4–3 The Inverse Assembler 4–10 Configuration Translation for Analyzer Modules 4–13 5 If You Have a Problem Analyzer Problems 5–3 Intermittent data errors 5–3 Unwanted triggers 5–3 No Setup/Hold field on format screen 5–4 No activity on activity indicators 5–4 Capacitive loading 5–4 No trace list display 5–5 Preprocessor Problems 5–6 Target system will not boot up 5–6 Slow clock 5–7 Erratic trace measurements 5–7 Inverse Assembler Problems 5–9 No inverse
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Contents Messages 5–12 “Default Calibration Factors Loaded” (HP 16540, 16541, and 16542) 5–12 “. . . Inverse Assembler Not Found” 5–12 “Measurement Initialization Error” 5–13 “No Configuration File Loaded” 5–14 “Selected File is Incompatible” 5–14 “Slow or Missing Clock” 5–14 “State Clock Violates Overdrive Specification” 5–15 “Time from Arm Greater Than 41.93 ms” 5–15 “Waiting for Trigger” 5–16 6 Application Notes Glossary Index x
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1 Triggering
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Triggering As you begin to understand a problem in your system, you may realize that certain conditions must occur before the problem occurs. You can use sequential triggering to ensure that those conditions have occurred before the analyzer recognizes its trigger and captures information. You set up sequential triggering as follows: • Select the Trigger menu for the module you are using. • In the Trigger menu, define terms and associated values to be used when searching through the sequence. •
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Triggering To store and time the execution of a subroutine To store and time the execution of a subroutine Most systems software of any kind is composed of a hierarchy of functions and procedures. During integration, testing, and performance evaluation, you will want to look at specific procedures to verify that they are executing correctly and that the implementation is efficient. The analyzer allows you to do this by triggering on entry to the address range of the subroutine and counting the e
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Triggering To store and time the execution of a subroutine Example Suppose you want to trigger on entry to a routine called MY_SUB. You can define the address of MY_SUB in the Format menu, allowing you to reference the symbol name when setting up the trace specification. Assume that MY_SUB extends for 0A hex locations. You can set up the trigger sequencer as shown in the display. Trigger Setup for Storing Execution of a Subroutine For processors that do prefetching of instructions or have pipeli
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Triggering To trigger on the nth iteration of a loop To trigger on the nth iteration of a loop Traditional debugging requires print statements around the area of interest. This is not possible in most embedded systems designs. But, the analyzer allows you to view the system’s behavior when a particular event occurs. Suppose that your system behaves incorrectly on the last iteration of a loop, which, in this instance, happens to be the 10th iteration. You can use the analyzer’s triggering capabil
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Triggering To trigger on the nth recursive call of a recursive function To trigger on the nth recursive call of a recursive function 1 Select the state analyzer Trigger menu. 2 Define the terms CALL_ADD, F_START, and F_END to represent the called address of the recursive function, and the start and end addresses of the function. Define F_EXIT to represent the address of the first program statement executed after the original recursive call has terminated. Typically, CALL_ADD is the address of th
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Triggering To trigger on the nth recursive call of a recursive function Triggering on the 22nd Call of a Recursive Function 1–7
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Triggering To trigger on entry to a function To trigger on entry to a function This sequence triggers on entry to a function only when it is called by one particular function. 1 Select the state analyzer Trigger menu. 2 Define the terms F1_START and F1_END to represent the start and end addresses of the calling function. Define F2_START to represent the start address of the called function. 3 Under State Sequence Levels, enter the following sequence specification: While storing “anystate” Fin
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Triggering To trigger on entry to a function Triggering on Entry to a Function 1–9
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Triggering To capture a write of known bad data to a particular variable To capture a write of known bad data to a particular variable The trigger specification ANDs the bad data on the data bus, write transaction on the status bus, and address of the variable on the address bus. 1 Select the state analyzer Trigger menu. 2 Define the terms BAD_DATA, WRITE, and VAR_ADDR to represent the bad data value, write status, and the address of the variable. 3 Under State Sequence Levels, enter the followi
